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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Robert Bragg <robert@sixbynine.org>
Cc: dri-devel@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	intel-gfx@lists.freedesktop.org,
	Sourab Gupta <sourab.gupta@intel.com>,
	Daniel Vetter <daniel.vetter@intel.com>
Subject: Re: [PATCH v4 07/11] drm/i915: advertise available metrics via sysfs
Date: Fri, 19 Aug 2016 11:19:25 +0100	[thread overview]
Message-ID: <20160819101925.GY22696@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <20160818224241.2315-8-robert@sixbynine.org>

On Thu, Aug 18, 2016 at 11:42:37PM +0100, Robert Bragg wrote:
> Each metric set is given a sysfs entry like:
> 
> /sys/class/drm/card0/metrics/<guid>/id
> 
> This allows userspace to enumerate the specific sets that are available
> for the current system. The 'id' file contains an unsigned integer that
> can be used to open the associated metric set via
> DRM_IOCTL_I915_PERF_OPEN. The <guid> is a globally unique ID for a
> specific OA unit register configuration that can be reliably used by
> userspace as a key to lookup corresponding counter meta data and
> normalization equations.
> 
> The guid registry is currently maintained as part of gputop along with
> the XML metric set descriptions and code generation scripts, ref:
> 
>  https://github.com/rib/gputop
>  > gputop-data/guids.xml
>  > scripts/update-guids.py
>  > gputop-data/oa-*.xml
>  > scripts/i915-perf-kernelgen.py
> 
>  $ make -C gputop-data -f Makefile.xml SYSFS=1 WHITELIST=RenderBasic
> 
> Signed-off-by: Robert Bragg <robert@sixbynine.org>
> ---
>  drivers/gpu/drm/i915/i915_drv.c    |  5 +++++
>  drivers/gpu/drm/i915/i915_drv.h    |  4 ++++
>  drivers/gpu/drm/i915/i915_oa_hsw.c | 45 +++++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/i915_oa_hsw.h |  4 ++++
>  drivers/gpu/drm/i915/i915_perf.c   | 46 ++++++++++++++++++++++++++++++++++++++
>  5 files changed, 104 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 92f668e..0f5f51b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1172,6 +1172,9 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
>  	 * cannot run before the connectors are registered.
>  	 */
>  	intel_fbdev_initial_config_async(dev);
> +
> +	/* Depends on sysfs having been initialized */
> +	i915_perf_register(dev_priv);

That's only true if drm_dev_register() returns 0. So this needs to be in
that branch, presumably.

> +int
> +i915_perf_init_sysfs_hsw(struct drm_i915_private *dev_priv)
> +{
> +	int ret;
> +
> +	ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic);
> +	if (ret)
> +		goto error_render_basic;
> +
> +	return 0;
> +
> +error_render_basic:
> +	return ret;
> +}
> +
> +void
> +i915_perf_deinit_sysfs_hsw(struct drm_i915_private *dev_priv)

I'd like these to be consistent with the phase, i.e.

perf_register_sysfs
perf_unregister_sysfs

> +void i915_perf_register(struct drm_i915_private *dev_priv)
> +{
> +	if (!dev_priv->perf.initialized)
> +		return;
> +
> +	/* To be sure we're synchronized with an attempted
> +	 * i915_perf_open_ioctl(); considering that we register after
> +	 * being exposed to userspace.
> +	 */
> +	mutex_lock(&dev_priv->perf.lock);
> +
> +	dev_priv->perf.metrics_kobj =
> +		kobject_create_and_add("metrics",
> +				       &dev_priv->drm.primary->kdev->kobj);
> +	if (!dev_priv->perf.metrics_kobj)
> +		goto exit;
> +
> +	if (i915_perf_init_sysfs_hsw(dev_priv)) {

If you say hsw only, I expect to see a local check or comment saying we
are on Haswell.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-08-19 10:19 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-18 22:42 [PATCH v4 00/11] Enable i915 perf stream for Haswell OA unit Robert Bragg
2016-08-18 22:42 ` [PATCH v4 01/11] drm/i915: Add i915 perf infrastructure Robert Bragg
2016-08-18 22:42 ` [PATCH v4 02/11] drm/i915: rename OACONTROL GEN7_OACONTROL Robert Bragg
2016-08-18 22:42 ` [PATCH v4 03/11] drm/i915: return EACCES for check_cmd() failures Robert Bragg
2016-08-18 22:42 ` [PATCH v4 04/11] drm/i915: don't whitelist oacontrol in cmd parser Robert Bragg
2016-08-18 22:42 ` [PATCH v4 05/11] drm/i915: Add 'render basic' Haswell OA unit config Robert Bragg
2016-08-18 22:42 ` [PATCH v4 06/11] drm/i915: Enable i915 perf stream for Haswell OA unit Robert Bragg
2016-08-18 22:42 ` [PATCH v4 07/11] drm/i915: advertise available metrics via sysfs Robert Bragg
2016-08-19 10:19   ` Chris Wilson [this message]
2016-08-19 14:04     ` [PATCH v5 " Robert Bragg
2016-08-18 22:42 ` [PATCH v4 08/11] drm/i915: Add dev.i915.perf_event_paranoid sysctl option Robert Bragg
2016-08-18 22:42 ` [PATCH v4 09/11] drm/i915: add oa_event_min_timer_exponent sysctl Robert Bragg
2016-08-18 22:42 ` [PATCH v4 10/11] drm/i915: Add more Haswell OA metric sets Robert Bragg
2016-08-18 22:42 ` [PATCH v4 11/11] drm/i915: Add a kerneldoc summary for i915_perf.c Robert Bragg
2016-08-19  5:58 ` ✗ Ro.CI.BAT: failure for Enable i915 perf stream for Haswell OA unit Patchwork
2016-08-19 14:10 ` ✗ Ro.CI.BAT: failure for Enable i915 perf stream for Haswell OA unit (rev2) Patchwork

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