Re: [PATCH v2 2/2] fpga manager: Add Xilinx slave serial SPI driver

From: Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org>
To: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Cc: linux-fpga-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Alan Tull
	<atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>,
	Moritz Fischer
	<moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Subject: Re: [PATCH v2 2/2] fpga manager: Add Xilinx slave serial SPI driver
Date: Tue, 21 Feb 2017 21:24:37 +0100	[thread overview]
Message-ID: <20170221212437.2911d74e@crub> (raw)
In-Reply-To: <3a30638c-68f6-8c2b-95b7-c8c700fe4867-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>

On Tue, 21 Feb 2017 19:53:40 +0100
Michal Simek michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org wrote:
...
>There is one thing I have checked ml505 - old virtex 5 board which has
>this interface.
>http://www-inst.eecs.berkeley.edu/~cs150/fa13/resources/ml50x_schematics.pdf
>
>And I was chatting with one board guy and I think that done pin should
>be optional not required because not all boards export it.
>
>Then there is a question how to find out that programming was done and
>that's something what I don't know. But will try to find out if you can
>send any sequence over spi to find it out instead of gpio done pin.

maybe the boards without DONE pin use INIT_B pin with external pull-up
for CRC error reporting after configuration? Not sure if this is a
reliable way to ensure the configuration has completed.

Thanks,
Anatolij
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