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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Emilio G . Cota" <cota@braap.org>
Subject: [Qemu-devel] [PULL 09/12] tcg: Increase hit rate of lookup_tb_ptr
Date: Mon, 19 Jun 2017 11:18:36 -0700	[thread overview]
Message-ID: <20170619181839.25249-10-rth@twiddle.net> (raw)
In-Reply-To: <20170619181839.25249-1-rth@twiddle.net>

We can call tb_htable_lookup even when the tb_jmp_cache is completely
empty.  Therefore, un-nest most of the code dependent on tb != NULL
from the read from the cache.

This improves the hit rate of lookup_tb_ptr; for instance, when booting
and immediately shutting down debian-arm, the hit rate improves from
93.2% to 99.4%.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg-runtime.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/tcg-runtime.c b/tcg-runtime.c
index 7fa90ce..ec3a34e 100644
--- a/tcg-runtime.c
+++ b/tcg-runtime.c
@@ -149,23 +149,23 @@ void *HELPER(lookup_tb_ptr)(CPUArchState *env, target_ulong addr)
     CPUState *cpu = ENV_GET_CPU(env);
     TranslationBlock *tb;
     target_ulong cs_base, pc;
-    uint32_t flags;
-
-    tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]);
-    if (likely(tb)) {
-        cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
-        if (likely(tb->pc == addr && tb->cs_base == cs_base &&
-                   tb->flags == flags)) {
-            goto found;
-        }
+    uint32_t flags, addr_hash;
+
+    addr_hash = tb_jmp_cache_hash_func(addr);
+    tb = atomic_rcu_read(&cpu->tb_jmp_cache[addr_hash]);
+    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
+
+    if (unlikely(!(tb
+                   && tb->pc == addr
+                   && tb->cs_base == cs_base
+                   && tb->flags == flags))) {
         tb = tb_htable_lookup(cpu, addr, cs_base, flags);
-        if (likely(tb)) {
-            atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)], tb);
-            goto found;
+        if (!tb) {
+            return tcg_ctx.code_gen_epilogue;
         }
+        atomic_set(&cpu->tb_jmp_cache[addr_hash], tb);
     }
-    return tcg_ctx.code_gen_epilogue;
- found:
+
     qemu_log_mask_and_addr(CPU_LOG_EXEC, addr,
                            "Chain %p [%d: " TARGET_FMT_lx "] %s\n",
                            tb->tc_ptr, cpu->cpu_index, addr,
-- 
2.9.4

  parent reply	other threads:[~2017-06-19 18:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-19 18:18 [Qemu-devel] [PULL 00/12] TCG queued patches Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 01/12] util: add cacheinfo Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 02/12] tcg: allocate TB structs before the corresponding translated code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 03/12] translate-all: consolidate tb init in tb_gen_code Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 04/12] tcg/aarch64: Use ADR in tcg_out_movi Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 05/12] tcg/arm: Use indirect branch for goto_tb Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 06/12] tcg/arm: Remove limit on code buffer size Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 07/12] tcg/arm: Try pc-relative addresses for movi Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 08/12] tcg/arm: Use ldr (literal) for goto_tb Richard Henderson
2017-06-19 18:18 ` Richard Henderson [this message]
2017-06-19 18:18 ` [Qemu-devel] [PULL 10/12] target/alpha: Use tcg_gen_lookup_and_goto_ptr Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 11/12] target/s390x: Exit after changing PSW mask Richard Henderson
2017-06-19 18:18 ` [Qemu-devel] [PULL 12/12] target/arm: Exit after clearing aarch64 interrupt mask Richard Henderson
2017-06-22 10:34 ` [Qemu-devel] [PULL 00/12] TCG queued patches Peter Maydell

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