Re: [PATCH 02/15] drm/i915/skl+: refactor WM calculation for NV12

From: kbuild test robot <lkp@intel.com>
Cc: intel-gfx@lists.freedesktop.org, kbuild-all@01.org,
	Vidya Srinivas <vidya.srinivas@intel.com>
Subject: Re: [PATCH 02/15] drm/i915/skl+: refactor WM calculation for NV12
Date: Sat, 20 Jan 2018 08:39:05 +0800	[thread overview]
Message-ID: <201801200845.0DrwZE9D%fengguang.wu@intel.com> (raw)
In-Reply-To: <1516484713-5837-3-git-send-email-vidya.srinivas@intel.com>

Hi Mahesh,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.15-rc8 next-20180119]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Vidya-Srinivas/Adding-NV12-support/20180120-064213
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
reproduce:
        # apt-get install sparse
        make ARCH=x86_64 allmodconfig
        make C=1 CF=-D__CHECK_ENDIAN__

sparse warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/i915/intel_pm.c:4794:73: sparse: Using plain integer as NULL pointer

vim +4794 drivers/gpu/drm/i915/intel_pm.c

  4764	
  4765	static void skl_write_plane_wm(struct intel_crtc *intel_crtc,
  4766				       const struct skl_plane_wm *wm,
  4767				       const struct skl_ddb_allocation *ddb,
  4768				       enum plane_id plane_id)
  4769	{
  4770		struct drm_crtc *crtc = &intel_crtc->base;
  4771		struct drm_device *dev = crtc->dev;
  4772		struct drm_i915_private *dev_priv = to_i915(dev);
  4773		int level, max_level = ilk_wm_max_level(dev_priv);
  4774		enum pipe pipe = intel_crtc->pipe;
  4775	
  4776		for (level = 0; level <= max_level; level++) {
  4777			skl_write_wm_level(dev_priv, PLANE_WM(pipe, plane_id, level),
  4778					   &wm->wm[level]);
  4779		}
  4780		skl_write_wm_level(dev_priv, PLANE_WM_TRANS(pipe, plane_id),
  4781				   &wm->trans_wm);
  4782	
  4783		if (wm->is_nv12) {
  4784			skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
  4785						&ddb->uv_plane[pipe][plane_id]);
  4786			skl_ddb_entry_write(dev_priv,
  4787					    PLANE_NV12_BUF_CFG(pipe, plane_id),
  4788					    &ddb->plane[pipe][plane_id]);
  4789		} else {
  4790			skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
  4791						&ddb->plane[pipe][plane_id]);
  4792			/* No NV12 buffer allocation for non NV12 pixel formats */
  4793			skl_ddb_entry_write(dev_priv,
> 4794					    PLANE_NV12_BUF_CFG(pipe, plane_id), 0x0);
  4795		}
  4796	}
  4797	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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