From: Rob Herring <robh@kernel.org>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
linux-clk <linux-clk@vger.kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH 2/2] clk: renesas: cpg-mssr: add R8A77980 support
Date: Mon, 5 Feb 2018 00:08:45 -0600 [thread overview]
Message-ID: <20180205060845.ksaczxkdil7wuir6@rob-hp-laptop> (raw)
In-Reply-To: <9008a12c-e5c8-9289-c47b-50ea9e049c67@cogentembedded.com>
On Wed, Jan 31, 2018 at 11:31:05PM +0300, Sergei Shtylyov wrote:
> Add R-Car V3H (R8A77980) Clock Pulse Generator / Module Standby and
> Software Reset support, using the CPG/MSSR driver core and the common
> R-Car Gen3 code.
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
> Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt | 5
Reviewed-by: Rob Herring <robh@kernel.org>
> drivers/clk/renesas/Kconfig | 5
> drivers/clk/renesas/Makefile | 1
> drivers/clk/renesas/r8a77980-cpg-mssr.c | 227 +++++++++++
> drivers/clk/renesas/renesas-cpg-mssr.c | 6
> drivers/clk/renesas/renesas-cpg-mssr.h | 1
> 6 files changed, 243 insertions(+), 2 deletions(-)
next prev parent reply other threads:[~2018-02-05 6:08 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-31 20:23 [PATCH 0/2] Renesas R8A77980 CPG/MSSR clock support Sergei Shtylyov
2018-01-31 20:23 ` Sergei Shtylyov
[not found] ` <5b7895ac-11c1-ac2d-837b-56726bc6226a-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-01-31 20:27 ` [PATCH 1/2] dt-bindings: clock: add R8A77980 CPG core clock definitions Sergei Shtylyov
2018-01-31 20:27 ` Sergei Shtylyov
2018-02-05 6:08 ` Rob Herring
[not found] ` <4281b305-ff0d-cf56-ce6b-dff4589c39f6-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-05 9:00 ` Simon Horman
2018-02-05 9:00 ` Simon Horman
2018-02-05 15:01 ` Geert Uytterhoeven
2018-02-05 15:01 ` Geert Uytterhoeven
2018-01-31 20:31 ` [PATCH 2/2] clk: renesas: cpg-mssr: add R8A77980 support Sergei Shtylyov
2018-01-31 20:31 ` Sergei Shtylyov
2018-02-05 6:08 ` Rob Herring [this message]
2018-02-05 8:59 ` Simon Horman
[not found] ` <9008a12c-e5c8-9289-c47b-50ea9e049c67-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>
2018-02-05 19:18 ` Geert Uytterhoeven
2018-02-05 19:18 ` Geert Uytterhoeven
2018-01-31 20:29 ` [PATCH 0/2] Renesas R8A77980 CPG/MSSR clock support Sergei Shtylyov
2018-08-21 16:41 ` [PATCH] clk: renesas: r8a77970: add SD0H/SD0 clocks for SDHI Sergei Shtylyov
2018-08-28 8:58 ` Geert Uytterhoeven
2018-09-01 18:54 ` [PATCH] clk: renesas: r8a77980: add CMT clocks Sergei Shtylyov
2018-09-03 7:48 ` Geert Uytterhoeven
2018-09-01 20:12 ` [PATCH v2] clk: renesas: r8a77970: add SD0H/SD0 clocks for SDHI Sergei Shtylyov
2018-09-03 7:43 ` Geert Uytterhoeven
2018-09-05 16:59 ` [PATCH] clk: renesas: r8a77970: add CMT clocks Sergei Shtylyov
2018-09-06 8:10 ` Chris Paterson
2018-09-06 8:10 ` Chris Paterson
2018-09-06 11:05 ` Geert Uytterhoeven
2018-09-06 20:28 ` [PATCH] clk: renesas: r8a77970: add TMU clocks Sergei Shtylyov
2018-09-10 14:10 ` Geert Uytterhoeven
2018-09-19 18:10 ` [PATCH] clk: renesas: r8a77970: add TPU clock Sergei Shtylyov
2018-09-21 7:27 ` Simon Horman
2018-09-24 8:04 ` Geert Uytterhoeven
2018-11-02 19:25 ` [PATCH] clk: renesas: r8a77970: add RPC clock Sergei Shtylyov
2018-11-02 19:25 ` Sergei Shtylyov
2018-11-04 8:09 ` Sergei Shtylyov
2018-11-04 8:09 ` Sergei Shtylyov
2018-11-05 13:20 ` Geert Uytterhoeven
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