From: Thierry Reding <thierry.reding@gmail.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Marcel Ziswiler <marcel@ziswiler.com>,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
Marcel Ziswiler <marcel.ziswiler@toradex.com>,
Stephen Boyd <sboyd@kernel.org>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v1 2/3] clk: tegra: ignore unused vfir clock shared with uartb
Date: Wed, 28 Nov 2018 10:24:04 +0100 [thread overview]
Message-ID: <20181128092404.GF17419@ulmo> (raw)
In-Reply-To: <20181101084152.GS7636@tbergstrom-lnx.Nvidia.com>
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On Thu, Nov 01, 2018 at 10:41:52AM +0200, Peter De Schrijver wrote:
> On Thu, Nov 01, 2018 at 02:52:29AM +0100, Marcel Ziswiler wrote:
> > From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> >
> > As UARTB and VFIR share their clock enable bit it is rather unwise for
> > the kernel to turn off the VFIR one should that be unused (and
> > potentially vice versa but so far there anyway is no VFIR driver).
> >
> > Without this patch trying to use UARTB with the regular 8250 driver
> > will freeze as soon as ttyS1 is accessed after boot. Luckily, using the
> > high-speed Tegra serial driver won't exhibit the issue as clocks are
> > dynamically enabled/disabled on every access.
> >
> > This has been reproduced both on Apalis T30 as well as Apalis TK1 but
> > may be an issue on all Tegra UARTB's which share the clock enable with
> > VFIR.
> >
>
> Ah.. the correct fix for this is to initialize the enable_refcnt based on the
> hw state. This is done in 9619dba8325fce098bbc9ee2911d1b0150fec0c9 for
> periph gate clocks, but obviously also applies to normal periph clocks.
Hi Marcel,
were you going to send a new version with the alternative fix as
suggested by Peter?
Thierry
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next prev parent reply other threads:[~2018-11-28 9:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-01 1:52 [PATCH v1 0/3] clk/serial tegra: uart related fixes Marcel Ziswiler
2018-11-01 1:52 ` [PATCH v1 1/3] clk: tegra: get rid of duplicate defines Marcel Ziswiler
2018-11-28 9:17 ` Thierry Reding
2018-12-10 19:10 ` Stephen Boyd
2018-11-01 1:52 ` [PATCH v1 2/3] clk: tegra: ignore unused vfir clock shared with uartb Marcel Ziswiler
2018-11-01 8:41 ` Peter De Schrijver
2018-11-01 8:41 ` Peter De Schrijver
2018-11-28 9:24 ` Thierry Reding [this message]
2018-12-10 21:41 ` Marcel Ziswiler
2018-11-01 1:52 ` [PATCH v1 3/3] serial: tegra: fix some spelling mistakes Marcel Ziswiler
2018-11-28 9:20 ` Thierry Reding
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