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From: Julien Grall <julien.grall@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com,
	Julien Grall <julien.grall@arm.com>,
	alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com
Subject: [RFC PATCH 6/8] arm64/sve: Implement helper to load SVE registers from FPSIMD state
Date: Fri, 18 Jan 2019 16:46:08 +0000	[thread overview]
Message-ID: <20190118164610.8123-7-julien.grall@arm.com> (raw)
In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com>

In a follow-up patch, we may save the FPSIMD rather than the full SVE
state when the state has to be zeroed on return to userspace (e.g during a
syscall).

Introduce an helper to load SVE vectors from FPSIMD state and zero the rest
of SVE registers.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 arch/arm64/include/asm/fpsimd.h  |  3 +++
 arch/arm64/kernel/entry-fpsimd.S | 17 +++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index fa2439205c35..859c2c108f92 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -82,6 +82,9 @@ extern void sve_load_state(void const *state, u32 const *pfpsr,
 
 extern void sve_flush_live(void);
 
+extern void sve_load_from_fpsimd_state(struct user_fpsimd_state const *state,
+				       unsigned long vq_minus_1);
+
 extern unsigned int sve_get_vl(void);
 
 struct arm64_cpu_capabilities;
diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S
index 17121a51c41f..35c21a707730 100644
--- a/arch/arm64/kernel/entry-fpsimd.S
+++ b/arch/arm64/kernel/entry-fpsimd.S
@@ -58,6 +58,23 @@ ENTRY(sve_get_vl)
 	ret
 ENDPROC(sve_get_vl)
 
+/*
+ * Load SVE state from FPSIMD state.
+ *
+ * x0 = pointer to struct fpsimd_state
+ * x1 = VQ - 1
+ *
+ * Each SVE vector will be loaded with the first 128-bits taken from FPSIMD
+ * and the rest zeroed. All the other SVE registers will be zeroed.
+ */
+ENTRY(sve_load_from_fpsimd_state)
+		sve_load_vq	x1, x2, x3
+		fpsimd_restore	x0, 8
+ _for n, 0, 15, _sve_pfalse	\n
+		_sve_wrffr 0
+		ret
+ENDPROC(sve_load_from_fpsimd_state)
+
 /* Zero all SVE registers but the first 128-bits of each vector */
 ENTRY(sve_flush_live)
 	sve_flush
-- 
2.11.0


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  parent reply	other threads:[~2019-01-18 16:48 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-18 16:46 [RFC PATCH 0/8] arm64/sve: First steps towards optimizing syscalls Julien Grall
2019-01-18 16:46 ` [RFC PATCH 1/8] arm64/fpsimd: Update documentation of do_sve_acc Julien Grall
2019-01-21 12:13   ` Mark Rutland
2019-01-22 16:03     ` Julien Grall
2019-01-18 16:46 ` [RFC PATCH 2/8] arm64/signal: Update the comment in preserve_sve_context Julien Grall
2019-01-21 12:17   ` Mark Rutland
2019-01-18 16:46 ` [RFC PATCH 3/8] arm64/fpsimdmacros: Allow the macro "for" to be used in more cases Julien Grall
2019-01-18 16:46 ` [RFC PATCH 4/8] arm64/fpsimdmacros: Introduce a macro to update ZCR_EL1.LEN Julien Grall
2019-01-18 16:46 ` [RFC PATCH 5/8] arm64/sve: Implement helper to flush SVE registers Julien Grall
2019-01-18 16:46 ` Julien Grall [this message]
2019-01-18 16:46 ` [RFC PATCH 7/8] arm64/sve: Don't disable SVE on syscalls return Julien Grall
2019-01-18 16:46 ` [RFC PATCH 8/8] arm64/sve: Rework SVE trap access to use TIF_SVE_NEEDS_FLUSH Julien Grall

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