From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Anusha <anusha.srivatsa@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 2/2] drm/i915/cml: Introduce Comet Lake PCH
Date: Mon, 4 Mar 2019 15:50:29 -0800 [thread overview]
Message-ID: <20190304235029.GN10303@intel.com> (raw)
In-Reply-To: <20190304230605.21919-2-anusha.srivatsa@intel.com>
On Mon, Mar 04, 2019 at 03:06:05PM -0800, Anusha wrote:
> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
>
> Comet Lake PCH is based off of Cannon Point(CNP).
> Add PCI ID for Comet Lake PCH.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 2 ++
> drivers/gpu/drm/i915/i915_drv.h | 3 ++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1b2f5a6f8c25..7934f19ed250 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -186,6 +186,8 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
> return PCH_CNP;
> case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
> DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
> + case INTEL_PCH_CMP_DEVICE_ID_TYPE:
> + DRM_DEBUG_KMS("Found Comet Lake LP PCH (CMP)\n");
> WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
> return PCH_CNP;
> case INTEL_PCH_ICP_DEVICE_ID_TYPE:
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 453af7438e67..55298e19e740 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -530,7 +530,7 @@ enum intel_pch {
> PCH_LPT, /* Lynxpoint/Wildcatpoint PCH */
> PCH_SPT, /* Sunrisepoint PCH */
> PCH_KBP, /* Kaby Lake PCH */
> - PCH_CNP, /* Cannon Lake PCH */
> + PCH_CNP, /* Cannon/Comet Lake PCH */
> PCH_ICP, /* Ice Lake PCH */
> PCH_NOP, /* PCH without south display */
> };
> @@ -2552,6 +2552,7 @@ static inline unsigned int i915_sg_segment_size(void)
> #define INTEL_PCH_KBP_DEVICE_ID_TYPE 0xA280
> #define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300
> #define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80
> +#define INTEL_PCH_CMP_DEVICE_ID_TYPE 0x0280
> #define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480
> #define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
> #define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
> --
> 2.21.0
>
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next prev parent reply other threads:[~2019-03-04 23:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-04 23:06 [PATCH 1/2] drm/i915/cml: Add CML PCI IDS Anusha
2019-03-04 23:06 ` [PATCH 2/2] drm/i915/cml: Introduce Comet Lake PCH Anusha
2019-03-04 23:50 ` Rodrigo Vivi [this message]
2019-03-05 1:58 ` Dhinakaran Pandiyan
2019-03-04 23:50 ` [PATCH 1/2] drm/i915/cml: Add CML PCI IDS Rodrigo Vivi
2019-03-05 0:53 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
2019-03-05 0:55 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-05 1:33 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-05 6:07 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-05 21:46 [PATCH 1/2] " Anusha
2019-03-05 21:46 ` [PATCH 2/2] drm/i915/cml: Introduce Comet Lake PCH Anusha
2019-03-06 18:07 ` Rodrigo Vivi
2019-03-07 2:20 ` Dhinakaran Pandiyan
2019-03-07 17:27 ` Rodrigo Vivi
2019-03-14 18:29 [PATCH 1/2] drm/i915/cml: Add CML PCI IDS Anusha
2019-03-14 18:29 ` [PATCH 2/2] drm/i915/cml: Introduce Comet Lake PCH Anusha
2019-03-14 20:00 ` Rodrigo Vivi
2019-03-15 10:23 ` Jani Nikula
2019-03-18 20:01 [PATCH 1/2] drm/i915/cml: Add CML PCI IDS Anusha
2019-03-18 20:01 ` [PATCH 2/2] drm/i915/cml: Introduce Comet Lake PCH Anusha
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