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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v3 3/5] drm/i915: Add _TRANS2()
Date: Mon, 15 Apr 2019 14:54:53 -0700	[thread overview]
Message-ID: <20190415215455.9176-3-jose.souza@intel.com> (raw)
In-Reply-To: <20190415215455.9176-1-jose.souza@intel.com>

A new macro that is going to be added in a further patch will need to
adjust the offset returned by _MMIO_TRANS2(), so here adding
_TRANS2() and moving most of the implementation of _MMIO_TRANS2() to
it and while at it taking the opportunity to rename pipe to trans.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e2803b120b6d..36420af2cd6f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -250,9 +250,10 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define _MMIO_PIPE2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->pipe_offsets[pipe] - \
 					      INTEL_INFO(dev_priv)->pipe_offsets[PIPE_A] + (reg) + \
 					      DISPLAY_MMIO_BASE(dev_priv))
-#define _MMIO_TRANS2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->trans_offsets[(pipe)] - \
-					      INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
-					      DISPLAY_MMIO_BASE(dev_priv))
+#define _TRANS2(trans, reg)		(INTEL_INFO(dev_priv)->trans_offsets[(trans)] - \
+					 INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
+					 DISPLAY_MMIO_BASE(dev_priv))
+#define _MMIO_TRANS2(trans, reg)	_MMIO(_TRANS2(trans, reg))
 #define _CURSOR2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->cursor_offsets[(pipe)] - \
 					      INTEL_INFO(dev_priv)->cursor_offsets[PIPE_A] + (reg) + \
 					      DISPLAY_MMIO_BASE(dev_priv))
-- 
2.21.0

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  parent reply	other threads:[~2019-04-15 21:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-15 21:54 [PATCH v3 1/5] drm/i915/bdw+: Move misc display IRQ handling to it own function José Roberto de Souza
2019-04-15 21:54 ` [PATCH v3 2/5] drm/i915/psr: Remove partial PSR support on multiple transcoders José Roberto de Souza
2019-04-15 21:54 ` José Roberto de Souza [this message]
2019-04-15 21:54 ` [PATCH v3 4/5] drm/i915: Make PSR registers relative to transcoders José Roberto de Souza
2019-04-16  9:07   ` Jani Nikula
2019-04-15 21:54 ` [PATCH v3 5/5] drm/i915: Add transcoder parameter to PSR registers macros José Roberto de Souza
2019-04-15 22:13 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/5] drm/i915/bdw+: Move misc display IRQ handling to it own function Patchwork
2019-04-15 22:15 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-04-15 22:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-04-16  0:24 ` ✓ Fi.CI.IGT: " Patchwork

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