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From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	qemu-devel@nongnu.org,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Richard Henderson <rth@twiddle.net>
Cc: Like Xu <like.xu@linux.intel.com>
Subject: [Qemu-devel] [PULL v6 04/42] hw/ppc: Replace global smp variables with machine smp properties
Date: Fri,  5 Jul 2019 19:14:26 -0300	[thread overview]
Message-ID: <20190705221504.25166-5-ehabkost@redhat.com> (raw)
In-Reply-To: <20190705221504.25166-1-ehabkost@redhat.com>

From: Like Xu <like.xu@linux.intel.com>

The global smp variables in ppc are replaced with smp machine properties.

A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.

Signed-off-by: Like Xu <like.xu@linux.intel.com>
Message-Id: <20190518205428.90532-5-like.xu@linux.intel.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 hw/ppc/e500.c         |  3 +++
 hw/ppc/mac_newworld.c |  3 ++-
 hw/ppc/mac_oldworld.c |  3 ++-
 hw/ppc/pnv.c          |  6 ++++--
 hw/ppc/prep.c         |  4 ++--
 hw/ppc/spapr.c        | 34 ++++++++++++++++++++++++++--------
 hw/ppc/spapr_rtas.c   |  4 +++-
 7 files changed, 42 insertions(+), 15 deletions(-)

diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index bfda1266af..a3eac7f057 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -308,6 +308,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
                                     bool dry_run)
 {
     MachineState *machine = MACHINE(pms);
+    unsigned int smp_cpus = machine->smp.cpus;
     const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
     CPUPPCState *env = first_cpu->env_ptr;
     int ret = -1;
@@ -735,6 +736,7 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms,
     SysBusDevice *s;
     int i, j, k;
     MachineState *machine = MACHINE(pms);
+    unsigned int smp_cpus = machine->smp.cpus;
     const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
 
     dev = qdev_create(NULL, TYPE_OPENPIC);
@@ -847,6 +849,7 @@ void ppce500_init(MachineState *machine)
     struct boot_info *boot_info;
     int dt_size;
     int i;
+    unsigned int smp_cpus = machine->smp.cpus;
     /* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
      * 4 respectively */
     unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index c8d3245524..09bc6068f3 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -136,6 +136,7 @@ static void ppc_core99_init(MachineState *machine)
     DeviceState *dev, *pic_dev;
     hwaddr nvram_addr = 0xFFF04000;
     uint64_t tbfreq;
+    unsigned int smp_cpus = machine->smp.cpus;
 
     linux_boot = (kernel_filename != NULL);
 
@@ -463,7 +464,7 @@ static void ppc_core99_init(MachineState *machine)
     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
 
     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index da751addc4..9ffde5b6f7 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -101,6 +101,7 @@ static void ppc_heathrow_init(MachineState *machine)
     DeviceState *dev, *pic_dev;
     BusState *adb_bus;
     int bios_size;
+    unsigned int smp_cpus = machine->smp.cpus;
     uint16_t ppc_boot_device;
     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     void *fw_cfg;
@@ -324,7 +325,7 @@ static void ppc_heathrow_init(MachineState *machine)
     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
 
     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index e364f79efd..bd4531c822 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -688,7 +688,8 @@ static void pnv_init(MachineState *machine)
         object_property_add_child(OBJECT(pnv), chip_name, chip, &error_fatal);
         object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
                                 &error_fatal);
-        object_property_set_int(chip, smp_cores, "nr-cores", &error_fatal);
+        object_property_set_int(chip, machine->smp.cores,
+                                "nr-cores", &error_fatal);
         object_property_set_bool(chip, true, "realized", &error_fatal);
     }
     g_free(chip_typename);
@@ -1149,6 +1150,7 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error **errp)
 
 static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
 {
+    MachineState *ms = MACHINE(qdev_get_machine());
     Error *error = NULL;
     PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
     const char *typename = pnv_chip_core_typename(chip);
@@ -1182,7 +1184,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
         snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
         object_initialize_child(OBJECT(chip), core_name, pnv_core, typesize,
                                 typename, &error_fatal, NULL);
-        object_property_set_int(OBJECT(pnv_core), smp_threads, "nr-threads",
+        object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
                                 &error_fatal);
         object_property_set_int(OBJECT(pnv_core), core_hwid,
                                 CPU_CORE_PROP_CORE_ID, &error_fatal);
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index a248ce480d..ab3c1df1fc 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -428,7 +428,7 @@ static void ppc_prep_init(MachineState *machine)
     linux_boot = (kernel_filename != NULL);
 
     /* init CPUs */
-    for (i = 0; i < smp_cpus; i++) {
+    for (i = 0; i < machine->smp.cpus; i++) {
         cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
         env = &cpu->env;
 
@@ -770,7 +770,7 @@ static void ibm_40p_init(MachineState *machine)
         boot_device = machine->boot_order[0];
     }
 
-    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP);
 
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 6cf0ac400b..51256ac9ca 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -106,6 +106,9 @@
  */
 static int spapr_vcpu_id(SpaprMachineState *spapr, int cpu_index)
 {
+    MachineState *ms = MACHINE(spapr);
+    unsigned int smp_threads = ms->smp.threads;
+
     assert(spapr->vsmt);
     return
         (cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads;
@@ -153,8 +156,10 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int i)
 
 int spapr_max_server_number(SpaprMachineState *spapr)
 {
+    MachineState *ms = MACHINE(spapr);
+
     assert(spapr->vsmt);
-    return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
+    return DIV_ROUND_UP(ms->smp.max_cpus * spapr->vsmt, ms->smp.threads);
 }
 
 static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
@@ -287,6 +292,7 @@ static void spapr_populate_pa_features(SpaprMachineState *spapr,
 
 static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
 {
+    MachineState *ms = MACHINE(spapr);
     int ret = 0, offset, cpus_offset;
     CPUState *cs;
     char cpu_model[32];
@@ -296,7 +302,7 @@ static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
         PowerPCCPU *cpu = POWERPC_CPU(cs);
         DeviceClass *dc = DEVICE_GET_CLASS(cs);
         int index = spapr_get_vcpu_id(cpu);
-        int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
+        int compat_smt = MIN(ms->smp.threads, ppc_compat_max_vthreads(cpu));
 
         if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
             continue;
@@ -442,6 +448,7 @@ static int spapr_populate_memory(SpaprMachineState *spapr, void *fdt)
 static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
                                   SpaprMachineState *spapr)
 {
+    MachineState *ms = MACHINE(spapr);
     PowerPCCPU *cpu = POWERPC_CPU(cs);
     CPUPPCState *env = &cpu->env;
     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
@@ -453,7 +460,8 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
     uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
     uint32_t page_sizes_prop[64];
     size_t page_sizes_prop_size;
-    uint32_t vcpus_per_socket = smp_threads * smp_cores;
+    unsigned int smp_threads = ms->smp.threads;
+    uint32_t vcpus_per_socket = smp_threads * ms->smp.cores;
     uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
     int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
     SpaprDrc *drc;
@@ -1026,6 +1034,7 @@ int spapr_h_cas_compose_response(SpaprMachineState *spapr,
 
 static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
 {
+    MachineState *ms = MACHINE(spapr);
     int rtas;
     GString *hypertas = g_string_sized_new(256);
     GString *qemu_hypertas = g_string_sized_new(256);
@@ -1036,7 +1045,7 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
         cpu_to_be32(max_device_addr >> 32),
         cpu_to_be32(max_device_addr & 0xffffffff),
         0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
-        cpu_to_be32(max_cpus / smp_threads),
+        cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
     };
     uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
     uint32_t maxdomains[] = {
@@ -2543,7 +2552,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
 /* find cpu slot in machine->possible_cpus by core_id */
 static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
 {
-    int index = id / smp_threads;
+    int index = id / ms->smp.threads;
 
     if (index >= ms->possible_cpus->len) {
         return NULL;
@@ -2556,10 +2565,12 @@ static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
 
 static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
 {
+    MachineState *ms = MACHINE(spapr);
     Error *local_err = NULL;
     bool vsmt_user = !!spapr->vsmt;
     int kvm_smt = kvmppc_smt_threads();
     int ret;
+    unsigned int smp_threads = ms->smp.threads;
 
     if (!kvm_enabled() && (smp_threads > 1)) {
         error_setg(&local_err, "TCG cannot support more than 1 thread/core "
@@ -2633,6 +2644,9 @@ static void spapr_init_cpus(SpaprMachineState *spapr)
     SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
     const char *type = spapr_get_cpu_core_type(machine->cpu_type);
     const CPUArchIdList *possible_cpus;
+    unsigned int smp_cpus = machine->smp.cpus;
+    unsigned int smp_threads = machine->smp.threads;
+    unsigned int max_cpus = machine->smp.max_cpus;
     int boot_cores_nr = smp_cpus / smp_threads;
     int i;
 
@@ -3859,6 +3873,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
     const char *type = object_get_typename(OBJECT(dev));
     CPUArchId *core_slot;
     int index;
+    unsigned int smp_threads = machine->smp.threads;
 
     if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
         error_setg(&local_err, "CPU hotplug not supported for this machine");
@@ -4124,14 +4139,16 @@ spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
 
 static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx)
 {
-    return idx / smp_cores % nb_numa_nodes;
+    return idx / ms->smp.cores % nb_numa_nodes;
 }
 
 static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
 {
     int i;
+    unsigned int smp_threads = machine->smp.threads;
+    unsigned int smp_cpus = machine->smp.cpus;
     const char *core_type;
-    int spapr_max_cores = max_cpus / smp_threads;
+    int spapr_max_cores = machine->smp.max_cpus / smp_threads;
     MachineClass *mc = MACHINE_GET_CLASS(machine);
 
     if (!mc->has_hotpluggable_cpus) {
@@ -4254,6 +4271,7 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu)
 void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
 {
     SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
+    MachineState *ms = MACHINE(spapr);
     int vcpu_id;
 
     vcpu_id = spapr_vcpu_id(spapr, cpu_index);
@@ -4262,7 +4280,7 @@ void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
         error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id);
         error_append_hint(errp, "Adjust the number of cpus to %d "
                           "or try to raise the number of threads per core\n",
-                          vcpu_id * smp_threads / spapr->vsmt);
+                          vcpu_id * ms->smp.threads / spapr->vsmt);
         return;
     }
 
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 5bc1a93271..a618a2ac0f 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -235,6 +235,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
                                           target_ulong args,
                                           uint32_t nret, target_ulong rets)
 {
+    MachineState *ms = MACHINE(qdev_get_machine());
+    unsigned int max_cpus = ms->smp.max_cpus;
     target_ulong parameter = rtas_ld(args, 0);
     target_ulong buffer = rtas_ld(args, 1);
     target_ulong length = rtas_ld(args, 2);
@@ -248,7 +250,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
                                           "MaxPlatProcs=%d",
                                           max_cpus,
                                           current_machine->ram_size / MiB,
-                                          smp_cpus,
+                                          ms->smp.cpus,
                                           max_cpus);
         ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
         g_free(param_val);
-- 
2.18.0.rc1.1.g3f1ff2140



  parent reply	other threads:[~2019-07-05 22:22 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-05 22:14 [Qemu-devel] [PULL v6 00/42] Machine and x86 queue, 2019-07-05 Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 01/42] hw/boards: Add struct CpuTopology to MachineState Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 02/42] machine: Refactor smp-related call chains to pass MachineState Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 03/42] general: Replace global smp variables with smp machine properties Eduardo Habkost
2019-07-05 22:14 ` Eduardo Habkost [this message]
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 05/42] hw/riscv: Replace global smp variables with machine smp properties Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 06/42] hw/s390x: " Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 07/42] hw/i386: " Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 08/42] hw/arm: " Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 09/42] hw: Replace global smp variables with MachineState for all remaining archs Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 10/42] vl.c: Replace smp global variables with smp machine properties Eduardo Habkost
2019-07-08 14:56   ` Laurent Desnogues
2019-07-08 20:40     ` Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 11/42] i386: Add die-level cpu topology to x86CPU on PCMachine Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 12/42] hw/i386: Adjust nr_dies with configured smp_dies for PCMachine Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 13/42] i386/cpu: Consolidate die-id validity in smp context Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 14/42] i386: Update new x86_apicid parsing rules with die_offset support Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 15/42] pc: fix possible NULL pointer dereference in pc_machine_get_device_memory_region_size() Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 16/42] machine: show if CLI option '-numa node, mem' is supported in QAPI schema Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 17/42] numa: deprecate 'mem' parameter of '-numa node' option Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 18/42] numa: deprecate implict memory distribution between nodes Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 19/42] hppa: Delete unused hppa_cpu_list() function Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 20/42] deprecate -mem-path fallback to anonymous RAM Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 21/42] i386: Don't print warning if phys-bits was set automatically Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 22/42] i386: Fix signedness of hyperv_spinlock_attempts Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 23/42] i386: make 'hv-spinlocks' a regular uint32 property Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 24/42] x86/cpu: use FeatureWordArray to define filtered_features Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 25/42] i386: Remove unused host_cpudef variable Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 26/42] target/i386: Add CPUID.1F generation support for multi-dies PCMachine Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 27/42] machine: Refactor smp_parse() in vl.c as MachineClass::smp_parse() Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 28/42] vl.c: Add -smp, dies=* command line support and update doc Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 29/42] qmp: Add deprecation information to query-machines Eduardo Habkost
2019-07-08 13:29   ` Eric Blake
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 30/42] i386: Introduce SnowRidge CPU model Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 31/42] qmp: Add "alias-of" field to query-cpu-definitions Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 32/42] i386: Add x-force-features option for testing Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 33/42] i386: Get model-id from CPU object on "-cpu help" Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 34/42] i386: Register versioned CPU models Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 35/42] i386: Define -IBRS, -noTSX, -IBRS versions of " Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 36/42] i386: Replace -noTSX, -IBRS, -IBPB CPU models with aliases Eduardo Habkost
2019-07-05 22:14 ` [Qemu-devel] [PULL v6 37/42] i386: Make unversioned CPU models be aliases Eduardo Habkost
2019-07-05 22:15 ` [Qemu-devel] [PULL v6 38/42] docs: Deprecate CPU model runnability guarantees Eduardo Habkost
2019-07-05 22:15 ` [Qemu-devel] [PULL v6 39/42] i386: Add Cascadelake-Server-v2 CPU model Eduardo Habkost
2019-07-05 22:15 ` [Qemu-devel] [PULL v6 40/42] numa: Make deprecation warnings conditional on !qtest_enabled() Eduardo Habkost
2019-07-05 22:15 ` [Qemu-devel] [PULL v6 41/42] numa: allow memory-less nodes when using memdev as backend Eduardo Habkost
2019-07-05 22:15 ` [Qemu-devel] [PULL v6 42/42] tests: use -numa memdev option in tests instead of legacy 'mem' option Eduardo Habkost
2019-07-06  6:46 ` [Qemu-devel] [PULL v6 00/42] Machine and x86 queue, 2019-07-05 no-reply
2019-07-08  9:26 ` Peter Maydell
2019-07-08 12:44   ` Igor Mammedov

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