Re: [Xen-devel] [PATCH] x86/cpuid: Fix handling of the CPUID.7[0].eax levelling MSR

From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: Xen-devel <xen-devel@lists.xenproject.org>, Wei Liu <wl@xen.org>,
	Jan Beulich <JBeulich@suse.com>
Subject: Re: [Xen-devel] [PATCH] x86/cpuid: Fix handling of the CPUID.7[0].eax levelling MSR
Date: Tue, 10 Sep 2019 11:29:12 +0200	[thread overview]
Message-ID: <20190910092912.s2seglrzng22zhjm@Air-de-Roger> (raw)
In-Reply-To: <20190909155124.19942-1-andrew.cooper3@citrix.com>

On Mon, Sep 09, 2019 at 04:51:24PM +0100, Andrew Cooper wrote:
> 7a0 is an integer field, not a mask - taking the logical and of the hardware
> and policy values results in nonsense.  Instead, take the policy value
> directly.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> ---
> CC: Jan Beulich <JBeulich@suse.com>
> CC: Wei Liu <wl@xen.org>
> CC: Roger Pau Monné <roger.pau@citrix.com>
> 
> Even Rome hardware has 7[0].eax still as 0, and there is no sensible reason to
> set max_subleaf higher at this point, so this is only a latent bug for now.
> ---
>  xen/arch/x86/domctl.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
> index 1e98fc8009..35ad8cb51c 100644
> --- a/xen/arch/x86/domctl.c
> +++ b/xen/arch/x86/domctl.c
> @@ -218,11 +218,16 @@ static int update_domain_cpuid_info(struct domain *d,
>          if ( is_pv_domain(d) && ((levelling_caps & LCAP_7ab0) == LCAP_7ab0) )
>          {
>              uint64_t mask = cpuidmask_defaults._7ab0;
> -            uint32_t eax = ctl->eax;
> -            uint32_t ebx = p->feat._7b0;
>  
> -            if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
> -                mask &= ((uint64_t)eax << 32) | ebx;
> +            /*
> +             * Leaf 7[0].eax is max_subleaf, not a feature mask.  Take it
> +             * wholesale from the policy, but clamp the features in 7[0].ebx
> +             * per usual.
> +             */
> +            if ( boot_cpu_data.x86_vendor &
> +                 (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
> +                mask = (((uint64_t)p->feat.max_subleaf << 32) |
> +                        ((uint32_t)mask | p->feat._7b0));

Why do you set the high bits of the mask (63:30) with the max subleaf?
According to the document I have bits 63:30 are reserved, and that
seems to match the expected CPUID return value, that lists CPUID
Fn0000_0007_EAX_x0 content as reserved.

Thanks, Roger.

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