From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Sandy Huang <hjc@rock-chips.com>
Cc: dri-devel@lists.freedesktop.org,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
Daniel Vetter <daniel@ffwll.ch>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 01/36] drm/fourcc: Add 2 plane YCbCr 10bit format support
Date: Mon, 23 Sep 2019 15:53:15 +0300 [thread overview]
Message-ID: <20190923125314.GJ1208@intel.com> (raw)
In-Reply-To: <1569242365-182133-2-git-send-email-hjc@rock-chips.com>
On Mon, Sep 23, 2019 at 08:38:50PM +0800, Sandy Huang wrote:
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 3feeaa3..5fe89e9 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -266,6 +266,21 @@ extern "C" {
> #define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */
>
> /*
> + * 2 plane YCbCr 10bit
> + * index 0 = Y plane, [9:0] Y
> + * index 1 = Cr:Cb plane, [19:0] Cr:Cb little endian
> + * or
> + * index 1 = Cb:Cr plane, [19:0] Cb:Cr little endian
What does "little endian" even mean for these?
> + */
> +
> +#define DRM_FORMAT_NV12_10 fourcc_code('N', 'A', '1', '2') /* 2x2 subsampled Cr:Cb plane */
> +#define DRM_FORMAT_NV21_10 fourcc_code('N', 'A', '2', '1') /* 2x2 subsampled Cb:Cr plane */
> +#define DRM_FORMAT_NV16_10 fourcc_code('N', 'A', '1', '6') /* 2x1 subsampled Cr:Cb plane */
> +#define DRM_FORMAT_NV61_10 fourcc_code('N', 'A', '6', '1') /* 2x1 subsampled Cb:Cr plane */
> +#define DRM_FORMAT_NV24_10 fourcc_code('N', 'A', '2', '4') /* non-subsampled Cr:Cb plane */
> +#define DRM_FORMAT_NV42_10 fourcc_code('N', 'A', '4', '2') /* non-subsampled Cb:Cr plane */
> +
> +/*
> * 3 plane YCbCr
> * index 0: Y plane, [7:0] Y
> * index 1: Cb plane, [7:0] Cb
> --
> 2.7.4
>
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2019-09-23 12:53 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-23 12:38 [PATCH 00/36] Add support 10bit yuv format Sandy Huang
2019-09-23 12:38 ` Sandy Huang
2019-09-23 12:38 ` [PATCH 01/36] drm/fourcc: Add 2 plane YCbCr 10bit format support Sandy Huang
2019-09-23 12:38 ` Sandy Huang
2019-09-23 12:53 ` Ville Syrjälä [this message]
2019-09-23 13:05 ` sandy.huang
2019-09-23 13:05 ` sandy.huang
2019-09-23 18:30 ` Ville Syrjälä
2019-09-23 18:30 ` Ville Syrjälä
2019-09-24 6:47 ` sandy.huang
2019-09-23 13:06 ` Daniel Vetter
2019-09-24 6:46 ` sandy.huang
2019-09-24 7:00 ` sandy.huang
2019-09-24 7:00 ` sandy.huang
2019-09-24 10:12 ` Ayan Halder
2019-09-25 8:09 ` sandy.huang
2019-09-25 8:09 ` sandy.huang
2019-09-25 11:23 ` Daniel Vetter
2019-09-23 12:38 ` [PATCH 02/36] drm/rockchip: use bpp instead of cpp for drm_format_info Sandy Huang
2019-09-23 12:38 ` Sandy Huang
2019-09-23 12:38 ` Sandy Huang
2019-09-23 12:38 ` [PATCH 03/36] drm/i915: " Sandy Huang
2019-09-23 12:38 ` [PATCH 04/36] drm: exynos: " Sandy Huang
2019-09-23 12:38 ` Sandy Huang
2019-09-23 12:38 ` Sandy Huang
2019-09-23 13:03 ` [PATCH 00/36] Add support 10bit yuv format Daniel Vetter
2019-09-23 13:03 ` Daniel Vetter
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