All of lore.kernel.org
 help / color / mirror / Atom feed
From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: lvivier@redhat.com, qemu-devel@nongnu.org, groug@kaod.org,
	qemu-ppc@nongnu.org, clg@kaod.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [PULL 17/28] spapr, xics, xive: Move SpaprIrq::post_load hook to backends
Date: Thu, 24 Oct 2019 19:18:02 +1100	[thread overview]
Message-ID: <20191024081813.2115-18-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20191024081813.2115-1-david@gibson.dropbear.id.au>

The remaining logic in the post_load hook really belongs to the interrupt
controller backends, and just needs to be called on the active controller
(after the active controller is set to the right thing based on the
incoming migration in the generic spapr_irq_post_load() logic).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
---
 hw/intc/spapr_xive.c        |  5 +++--
 hw/intc/xics_spapr.c        | 13 +++++++++++
 hw/ppc/spapr_irq.c          | 45 ++++---------------------------------
 include/hw/ppc/spapr_irq.h  |  3 +--
 include/hw/ppc/spapr_xive.h |  1 -
 5 files changed, 21 insertions(+), 46 deletions(-)

diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 1811653aac..ba32d2cc5b 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -462,10 +462,10 @@ static int vmstate_spapr_xive_pre_save(void *opaque)
  * Called by the sPAPR IRQ backend 'post_load' method at the machine
  * level.
  */
-int spapr_xive_post_load(SpaprXive *xive, int version_id)
+static int spapr_xive_post_load(SpaprInterruptController *intc, int version_id)
 {
     if (kvm_irqchip_in_kernel()) {
-        return kvmppc_xive_post_load(xive, version_id);
+        return kvmppc_xive_post_load(SPAPR_XIVE(intc), version_id);
     }
 
     return 0;
@@ -702,6 +702,7 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data)
     sicc->set_irq = spapr_xive_set_irq;
     sicc->print_info = spapr_xive_print_info;
     sicc->dt = spapr_xive_dt;
+    sicc->post_load = spapr_xive_post_load;
 }
 
 static const TypeInfo spapr_xive_info = {
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 90b4d48877..4f64b9a9fc 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -395,6 +395,18 @@ static void xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon)
     ics_pic_print_info(ics, mon);
 }
 
+static int xics_spapr_post_load(SpaprInterruptController *intc, int version_id)
+{
+    if (!kvm_irqchip_in_kernel()) {
+        CPUState *cs;
+        CPU_FOREACH(cs) {
+            PowerPCCPU *cpu = POWERPC_CPU(cs);
+            icp_resend(spapr_cpu_state(cpu)->icp);
+        }
+    }
+    return 0;
+}
+
 static int xics_spapr_activate(SpaprInterruptController *intc, Error **errp)
 {
     if (kvm_enabled()) {
@@ -426,6 +438,7 @@ static void ics_spapr_class_init(ObjectClass *klass, void *data)
     sicc->set_irq = xics_spapr_set_irq;
     sicc->print_info = xics_spapr_print_info;
     sicc->dt = xics_spapr_dt;
+    sicc->post_load = xics_spapr_post_load;
 }
 
 static const TypeInfo ics_spapr_info = {
diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
index f70b331f44..f3d18b1dad 100644
--- a/hw/ppc/spapr_irq.c
+++ b/hw/ppc/spapr_irq.c
@@ -100,43 +100,22 @@ int spapr_irq_init_kvm(int (*fn)(SpaprInterruptController *, Error **),
  * XICS IRQ backend.
  */
 
-static int spapr_irq_post_load_xics(SpaprMachineState *spapr, int version_id)
-{
-    if (!kvm_irqchip_in_kernel()) {
-        CPUState *cs;
-        CPU_FOREACH(cs) {
-            PowerPCCPU *cpu = POWERPC_CPU(cs);
-            icp_resend(spapr_cpu_state(cpu)->icp);
-        }
-    }
-    return 0;
-}
-
 SpaprIrq spapr_irq_xics = {
     .nr_xirqs    = SPAPR_NR_XIRQS,
     .nr_msis     = SPAPR_NR_MSIS,
     .xics        = true,
     .xive        = false,
-
-    .post_load   = spapr_irq_post_load_xics,
 };
 
 /*
  * XIVE IRQ backend.
  */
 
-static int spapr_irq_post_load_xive(SpaprMachineState *spapr, int version_id)
-{
-    return spapr_xive_post_load(spapr->xive, version_id);
-}
-
 SpaprIrq spapr_irq_xive = {
     .nr_xirqs    = SPAPR_NR_XIRQS,
     .nr_msis     = SPAPR_NR_MSIS,
     .xics        = false,
     .xive        = true,
-
-    .post_load   = spapr_irq_post_load_xive,
 };
 
 /*
@@ -148,21 +127,6 @@ SpaprIrq spapr_irq_xive = {
  * activated after an extra machine reset.
  */
 
-/*
- * Returns the sPAPR IRQ backend negotiated by CAS. XICS is the
- * default.
- */
-static SpaprIrq *spapr_irq_current(SpaprMachineState *spapr)
-{
-    return spapr_ovec_test(spapr->ov5_cas, OV5_XIVE_EXPLOIT) ?
-        &spapr_irq_xive : &spapr_irq_xics;
-}
-
-static int spapr_irq_post_load_dual(SpaprMachineState *spapr, int version_id)
-{
-    return spapr_irq_current(spapr)->post_load(spapr, version_id);
-}
-
 /*
  * Define values in sync with the XIVE and XICS backend
  */
@@ -171,8 +135,6 @@ SpaprIrq spapr_irq_dual = {
     .nr_msis     = SPAPR_NR_MSIS,
     .xics        = true,
     .xive        = true,
-
-    .post_load   = spapr_irq_post_load_dual,
 };
 
 
@@ -447,8 +409,11 @@ qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq)
 
 int spapr_irq_post_load(SpaprMachineState *spapr, int version_id)
 {
+    SpaprInterruptControllerClass *sicc;
+
     spapr_irq_update_active_intc(spapr);
-    return spapr->irq->post_load(spapr, version_id);
+    sicc = SPAPR_INTC_GET_CLASS(spapr->active_intc);
+    return sicc->post_load(spapr->active_intc, version_id);
 }
 
 void spapr_irq_reset(SpaprMachineState *spapr, Error **errp)
@@ -589,8 +554,6 @@ SpaprIrq spapr_irq_xics_legacy = {
     .nr_msis     = SPAPR_IRQ_XICS_LEGACY_NR_XIRQS,
     .xics        = true,
     .xive        = false,
-
-    .post_load   = spapr_irq_post_load_xics,
 };
 
 static void spapr_irq_register_types(void)
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index e02e44624b..08173e714c 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -62,6 +62,7 @@ typedef struct SpaprInterruptControllerClass {
     void (*print_info)(SpaprInterruptController *intc, Monitor *mon);
     void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers,
                void *fdt, uint32_t phandle);
+    int (*post_load)(SpaprInterruptController *intc, int version_id);
 } SpaprInterruptControllerClass;
 
 void spapr_irq_update_active_intc(SpaprMachineState *spapr);
@@ -82,8 +83,6 @@ typedef struct SpaprIrq {
     uint32_t    nr_msis;
     bool        xics;
     bool        xive;
-
-    int (*post_load)(SpaprMachineState *spapr, int version_id);
 } SpaprIrq;
 
 extern SpaprIrq spapr_irq_xics;
diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
index 64972754f9..d84bd5c229 100644
--- a/include/hw/ppc/spapr_xive.h
+++ b/include/hw/ppc/spapr_xive.h
@@ -55,7 +55,6 @@ typedef struct SpaprXive {
 #define SPAPR_XIVE_BLOCK_ID 0x0
 
 void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon);
-int spapr_xive_post_load(SpaprXive *xive, int version_id);
 
 void spapr_xive_hcall_init(SpaprMachineState *spapr);
 void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx);
-- 
2.21.0



  parent reply	other threads:[~2019-10-24  8:36 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24  8:17 [PULL 00/28] ppc-for-4.2 queue 20191024 David Gibson
2019-10-24  8:17 ` [PULL 01/28] xive: Make some device types not user creatable David Gibson
2019-10-24  8:17 ` [PULL 02/28] xics: " David Gibson
2019-10-24  8:17 ` [PULL 03/28] target/ppc: Fix for optimized vsl/vsr instructions David Gibson
2019-10-24  8:17 ` [PULL 04/28] ppc/pnv: Improve trigger data definition David Gibson
2019-10-24  8:17 ` [PULL 05/28] ppc/pnv: Use address_space_stq_be() when triggering an interrupt from PSI David Gibson
2019-10-24  8:17 ` [PULL 06/28] spapr: Set VSMT to smp_threads by default David Gibson
2019-11-08 13:11   ` Laurent Vivier
2019-11-08 14:26     ` David Gibson
2019-11-08 15:34       ` Laurent Vivier
2019-11-08 15:42         ` Laurent Vivier
2019-10-24  8:17 ` [PULL 07/28] spapr, xics, xive: Introduce SpaprInterruptController QOM interface David Gibson
2019-10-24  8:17 ` [PULL 08/28] spapr, xics, xive: Move cpu_intc_create from SpaprIrq to SpaprInterruptController David Gibson
2019-10-24  8:17 ` [PULL 09/28] spapr, xics, xive: Move irq claim and free " David Gibson
2019-10-24  8:17 ` [PULL 10/28] spapr: Formalize notion of active interrupt controller David Gibson
2019-10-24  8:17 ` [PULL 11/28] spapr, xics, xive: Move set_irq from SpaprIrq to SpaprInterruptController David Gibson
2019-10-24  8:17 ` [PULL 12/28] spapr, xics, xive: Move print_info " David Gibson
2019-10-24  8:17 ` [PULL 13/28] spapr, xics, xive: Move dt_populate " David Gibson
2019-10-24  8:17 ` [PULL 14/28] spapr, xics, xive: Match signatures for XICS and XIVE KVM connect routines David Gibson
2019-10-24  8:18 ` [PULL 15/28] spapr: Remove SpaprIrq::init_kvm hook David Gibson
2019-10-24  8:18 ` [PULL 16/28] spapr, xics, xive: Move SpaprIrq::reset hook logic into activate/deactivate David Gibson
2019-10-24  8:18 ` David Gibson [this message]
2019-10-24  8:18 ` [PULL 18/28] spapr: Remove SpaprIrq::nr_msis David Gibson
2019-10-24  8:18 ` [PULL 19/28] spapr: Move SpaprIrq::nr_xirqs to SpaprMachineClass David Gibson
2019-10-24  8:18 ` [PULL 20/28] pseries: Update SLOF firmware image David Gibson
2019-10-24  8:18 ` [PULL 21/28] spapr: Don't request to unplug the same core twice David Gibson
2019-10-24  8:18 ` [PULL 22/28] spapr: move CPU reset after presenter creation David Gibson
2019-10-24  8:18 ` [PULL 23/28] spapr_cpu_core: Implement DeviceClass::reset David Gibson
2019-10-24  8:18 ` [PULL 24/28] ppc/pnv: Introduce a PnvCore reset handler David Gibson
2019-10-24  8:18 ` [PULL 25/28] ppc/pnv: Add a PnvChip pointer to PnvCore David Gibson
2019-10-24  8:18 ` [PULL 26/28] ppc: Reset the interrupt presenter from the CPU reset handler David Gibson
2019-10-24  8:18 ` [PULL 27/28] ppc/pnv: Fix naming of routines realizing the CPUs David Gibson
2019-10-24  8:18 ` [PULL 28/28] spapr/xive: Set the OS CAM line at reset David Gibson
2019-10-24 16:09 ` [PULL 00/28] ppc-for-4.2 queue 20191024 Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191024081813.2115-18-david@gibson.dropbear.id.au \
    --to=david@gibson.dropbear.id.au \
    --cc=clg@kaod.org \
    --cc=groug@kaod.org \
    --cc=lvivier@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.