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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 27/34] Memory: Enable writeback for given memory region
Date: Mon, 16 Dec 2019 11:08:57 +0000	[thread overview]
Message-ID: <20191216110904.30815-28-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191216110904.30815-1-peter.maydell@linaro.org>

From: Beata Michalska <beata.michalska@linaro.org>

Add an option to trigger memory writeback to sync given memory region
with the corresponding backing store, case one is available.
This extends the support for persistent memory, allowing syncing on-demand.

Signed-off-by: Beata Michalska <beata.michalska@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191121000843.24844-3-beata.michalska@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/exec/memory.h   |  6 ++++++
 include/exec/ram_addr.h |  8 ++++++++
 include/qemu/cutils.h   |  1 +
 exec.c                  | 36 ++++++++++++++++++++++++++++++++++++
 memory.c                | 12 ++++++++++++
 util/cutils.c           | 38 ++++++++++++++++++++++++++++++++++++++
 6 files changed, 101 insertions(+)

diff --git a/include/exec/memory.h b/include/exec/memory.h
index e499dc215b3..27a84e0cc34 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -1265,6 +1265,12 @@ void *memory_region_get_ram_ptr(MemoryRegion *mr);
  */
 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize,
                               Error **errp);
+/**
+ * memory_region_do_writeback: Trigger writeback for selected address range
+ * [addr, addr + size]
+ *
+ */
+void memory_region_do_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size);
 
 /**
  * memory_region_set_log: Turn dirty logging on or off for a region.
diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h
index bed0554f4d2..5adebb0bc7c 100644
--- a/include/exec/ram_addr.h
+++ b/include/exec/ram_addr.h
@@ -174,6 +174,14 @@ void qemu_ram_free(RAMBlock *block);
 
 int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp);
 
+void qemu_ram_writeback(RAMBlock *block, ram_addr_t start, ram_addr_t length);
+
+/* Clear whole block of mem */
+static inline void qemu_ram_block_writeback(RAMBlock *block)
+{
+    qemu_ram_writeback(block, 0, block->used_length);
+}
+
 #define DIRTY_CLIENTS_ALL     ((1 << DIRTY_MEMORY_NUM) - 1)
 #define DIRTY_CLIENTS_NOCODE  (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_CODE))
 
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
index b54c847e0fe..eb59852dfdf 100644
--- a/include/qemu/cutils.h
+++ b/include/qemu/cutils.h
@@ -130,6 +130,7 @@ const char *qemu_strchrnul(const char *s, int c);
 #endif
 time_t mktimegm(struct tm *tm);
 int qemu_fdatasync(int fd);
+int qemu_msync(void *addr, size_t length, int fd);
 int fcntl_setfl(int fd, int flag);
 int qemu_parse_fd(const char *param);
 int qemu_strtoi(const char *nptr, const char **endptr, int base,
diff --git a/exec.c b/exec.c
index ffdb5185353..a34c3481840 100644
--- a/exec.c
+++ b/exec.c
@@ -65,6 +65,8 @@
 #include "exec/ram_addr.h"
 #include "exec/log.h"
 
+#include "qemu/pmem.h"
+
 #include "migration/vmstate.h"
 
 #include "qemu/range.h"
@@ -2156,6 +2158,40 @@ int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp)
     return 0;
 }
 
+/*
+ * Trigger sync on the given ram block for range [start, start + length]
+ * with the backing store if one is available.
+ * Otherwise no-op.
+ * @Note: this is supposed to be a synchronous op.
+ */
+void qemu_ram_writeback(RAMBlock *block, ram_addr_t start, ram_addr_t length)
+{
+    void *addr = ramblock_ptr(block, start);
+
+    /* The requested range should fit in within the block range */
+    g_assert((start + length) <= block->used_length);
+
+#ifdef CONFIG_LIBPMEM
+    /* The lack of support for pmem should not block the sync */
+    if (ramblock_is_pmem(block)) {
+        pmem_persist(addr, length);
+        return;
+    }
+#endif
+    if (block->fd >= 0) {
+        /**
+         * Case there is no support for PMEM or the memory has not been
+         * specified as persistent (or is not one) - use the msync.
+         * Less optimal but still achieves the same goal
+         */
+        if (qemu_msync(addr, length, block->fd)) {
+            warn_report("%s: failed to sync memory range: start: "
+                    RAM_ADDR_FMT " length: " RAM_ADDR_FMT,
+                    __func__, start, length);
+        }
+    }
+}
+
 /* Called with ram_list.mutex held */
 static void dirty_memory_extend(ram_addr_t old_ram_size,
                                 ram_addr_t new_ram_size)
diff --git a/memory.c b/memory.c
index 06484c2bff2..0228cad38d0 100644
--- a/memory.c
+++ b/memory.c
@@ -2207,6 +2207,18 @@ void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp
     qemu_ram_resize(mr->ram_block, newsize, errp);
 }
 
+
+void memory_region_do_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
+{
+    /*
+     * Might be extended case needed to cover
+     * different types of memory regions
+     */
+    if (mr->ram_block && mr->dirty_log_mask) {
+        qemu_ram_writeback(mr->ram_block, addr, size);
+    }
+}
+
 /*
  * Call proper memory listeners about the change on the newly
  * added/removed CoalescedMemoryRange.
diff --git a/util/cutils.c b/util/cutils.c
index 77acadc70ac..23801652303 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -164,6 +164,44 @@ int qemu_fdatasync(int fd)
 #endif
 }
 
+/**
+ * Sync changes made to the memory mapped file back to the backing
+ * storage. For POSIX compliant systems this will fallback
+ * to regular msync call. Otherwise it will trigger whole file sync
+ * (including the metadata case there is no support to skip that otherwise)
+ *
+ * @addr   - start of the memory area to be synced
+ * @length - length of the are to be synced
+ * @fd     - file descriptor for the file to be synced
+ *           (mandatory only for POSIX non-compliant systems)
+ */
+int qemu_msync(void *addr, size_t length, int fd)
+{
+#ifdef CONFIG_POSIX
+    size_t align_mask = ~(qemu_real_host_page_size - 1);
+
+    /**
+     * There are no strict reqs as per the length of mapping
+     * to be synced. Still the length needs to follow the address
+     * alignment changes. Additionally - round the size to the multiple
+     * of PAGE_SIZE
+     */
+    length += ((uintptr_t)addr & (qemu_real_host_page_size - 1));
+    length = (length + ~align_mask) & align_mask;
+
+    addr = (void *)((uintptr_t)addr & align_mask);
+
+    return msync(addr, length, MS_SYNC);
+#else /* CONFIG_POSIX */
+    /**
+     * Perform the sync based on the file descriptor
+     * The sync range will most probably be wider than the one
+     * requested - but it will still get the job done
+     */
+    return qemu_fdatasync(fd);
+#endif /* CONFIG_POSIX */
+}
+
 #ifndef _WIN32
 /* Sets a specific flag */
 int fcntl_setfl(int fd, int flag)
-- 
2.20.1



  parent reply	other threads:[~2019-12-16 11:34 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-16 11:08 [PULL 00/34] target-arm queue Peter Maydell
2019-12-16 11:08 ` [PULL 01/34] target/arm: Add support for cortex-m7 CPU Peter Maydell
2019-12-16 11:08 ` [PULL 02/34] exynos4210_gic: Suppress gcc9 format-truncation warnings Peter Maydell
2019-12-16 11:08 ` [PULL 03/34] aspeed/i2c: Add support for pool buffer transfers Peter Maydell
2019-12-16 11:08 ` [PULL 04/34] aspeed/i2c: Check SRAM enablement on AST2500 Peter Maydell
2019-12-16 11:08 ` [PULL 05/34] aspeed: Add a DRAM memory region at the SoC level Peter Maydell
2019-12-16 11:08 ` [PULL 06/34] aspeed/i2c: Add support for DMA transfers Peter Maydell
2019-12-16 11:08 ` [PULL 07/34] aspeed/i2c: Add trace events Peter Maydell
2019-12-16 11:08 ` [PULL 08/34] aspeed/sdmc: Make ast2600 default 1G Peter Maydell
2019-12-16 11:08 ` [PULL 09/34] aspeed/scu: Fix W1C behavior Peter Maydell
2019-12-16 11:08 ` [PULL 10/34] watchdog/aspeed: Improve watchdog timeout message Peter Maydell
2019-12-16 11:08 ` [PULL 11/34] watchdog/aspeed: Fix AST2600 frequency behaviour Peter Maydell
2019-12-16 11:08 ` [PULL 12/34] aspeed/smc: Restore default AHB window mapping at reset Peter Maydell
2019-12-16 11:08 ` [PULL 13/34] aspeed/smc: Do not map disabled segment on the AST2600 Peter Maydell
2019-12-16 11:08 ` [PULL 14/34] aspeed/smc: Add AST2600 timings registers Peter Maydell
2019-12-16 11:08 ` [PULL 15/34] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass Peter Maydell
2019-12-16 11:08 ` [PULL 16/34] aspeed: Add support for the tacoma-bmc board Peter Maydell
2019-12-16 11:08 ` [PULL 17/34] gpio: fix memory leak in aspeed_gpio_init() Peter Maydell
2019-12-16 11:08 ` [PULL 18/34] aspeed: Change the "scu" property definition Peter Maydell
2019-12-16 11:08 ` [PULL 19/34] aspeed: Change the "nic" " Peter Maydell
2019-12-16 11:08 ` [PULL 20/34] target/arm: Honor HCR_EL2.TID2 trapping requirements Peter Maydell
2019-12-16 11:08 ` [PULL 21/34] target/arm: Honor HCR_EL2.TID1 " Peter Maydell
2019-12-16 11:08 ` [PULL 22/34] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions Peter Maydell
2019-12-16 11:08 ` [PULL 23/34] target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 Peter Maydell
2019-12-16 11:08 ` [PULL 24/34] target/arm: Add support for missing Jazelle system registers Peter Maydell
2019-12-16 11:08 ` [PULL 25/34] arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() Peter Maydell
2019-12-16 11:08 ` [PULL 26/34] tcg: cputlb: Add probe_read Peter Maydell
2019-12-16 11:08 ` Peter Maydell [this message]
2019-12-16 11:08 ` [PULL 28/34] migration: ram: Switch to ram block writeback Peter Maydell
2019-12-16 11:08 ` [PULL 29/34] target/arm: Add support for DC CVAP & DC CVADP ins Peter Maydell
2019-12-16 11:09 ` [PULL 30/34] hw/arm/sbsa-ref: Simplify by moving the gic in the machine state Peter Maydell
2019-12-16 11:09 ` [PULL 31/34] hw/arm/acpi: simplify AML bit and/or statement Peter Maydell
2019-12-16 11:09 ` [PULL 32/34] hw/arm/acpi: enable SHPC native hot plug Peter Maydell
2019-12-16 11:09 ` [PULL 33/34] hw/arm/virt: Simplify by moving the gic in the machine state Peter Maydell
2019-12-16 11:09 ` [PULL 34/34] target/arm: ensure we use current exception state after SCR update Peter Maydell
2019-12-16 14:07 ` [PULL 00/34] target-arm queue Peter Maydell

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