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From: Imre Deak <imre.deak@intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "Chiou, Cooper" <cooper.chiou@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"kai.heng.feng@canonical.com" <kai.heng.feng@canonical.com>
Subject: Re: [Intel-gfx] [PATCH v2 4/8] drm/i915/tc/icl: Implement TC cold sequences
Date: Wed, 8 Apr 2020 00:52:26 +0300	[thread overview]
Message-ID: <20200407215226.GA23597@ideak-desk.fi.intel.com> (raw)
In-Reply-To: <953592d02bb1c6587b4a12cd5dabb2926e8f3da5.camel@intel.com>

On Tue, Apr 07, 2020 at 11:01:14PM +0300, Souza, Jose wrote:
> [...]
> > > +	} while (ret == -EAGAIN);
> > 
> > Let's protect against an endless loop.
> 
> const ktime_t timeout = ktime_add_ms(ktime_get_raw(), 3);
> int ret;
> 
> do {
> 	ret = sandybridge_pcode_write_timeout(i915,
> 					      ICL_PCODE_EXIT_TCCOLD,
> 					      0, 250, 1);
> } while (ret == -EAGAIN && ktime_compare(timeout, ktime_get_raw()) > 0);

Why not just a simple

	trial = 0;
	while (1) {
		ret = pcode_write();
		if (ret != -EAGAIN || ++trial == 3)
			break;
		msleep(1);
	}

with the msleep(1), as if the PCODE run/busy flag didn't get cleared after
the 1ms polling, it probably doesn't make sense to retry in a tight loop.

--Imre
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  reply	other threads:[~2020-04-07 21:52 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-07  1:11 [Intel-gfx] [PATCH v2 1/8] drm/i915/display: Move out code to return the digital_port of the aux ch José Roberto de Souza
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/display: Add intel_legacy_aux_to_power_domain() José Roberto de Souza
2020-04-07 15:15   ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 3/8] drm/i915/display: Split hsw_power_well_enable() into two José Roberto de Souza
2020-04-07 15:20   ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 4/8] drm/i915/tc/icl: Implement TC cold sequences José Roberto de Souza
2020-04-07 15:42   ` Imre Deak
2020-04-07 20:01     ` Souza, Jose
2020-04-07 21:52       ` Imre Deak [this message]
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 5/8] drm/i915/tc: Skip ref held check for TC legacy aux power wells José Roberto de Souza
2020-04-07 15:42   ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/tc/tgl: Implement TC cold sequences José Roberto de Souza
2020-04-07 16:02   ` Imre Deak
2020-04-07 21:20     ` Souza, Jose
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/tc: Catch TC users accessing FIA registers without enable aux José Roberto de Souza
2020-04-07 16:04   ` Imre Deak
2020-04-07 18:20     ` Imre Deak
2020-04-07  1:11 ` [Intel-gfx] [PATCH v2 8/8] drm/i915/tc: Do not warn when aux power well of static TC ports timeout José Roberto de Souza
2020-04-07 16:18   ` Imre Deak
2020-04-07  1:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/8] drm/i915/display: Move out code to return the digital_port of the aux ch Patchwork
2020-04-07  1:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-07  7:35 ` [Intel-gfx] [v2, 1/8] " You-Sheng Yang
2020-04-07 10:28 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/8] " Patchwork
2020-04-07 21:56   ` Souza, Jose
2020-04-07 15:13 ` [Intel-gfx] [PATCH v2 1/8] " Imre Deak

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