From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Cc: figlesia@xilinx.com, peter.maydell@linaro.org,
sstabellini@kernel.org, edgar.iglesias@xilinx.com,
sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com,
alistair@alistair23.me, richard.henderson@linaro.org,
frederic.konrad@adacore.com, philmd@redhat.com,
luc.michel@greensocs.com
Subject: [PATCH v2 6/6] target/microblaze: Add the pvr-user2 property
Date: Mon, 20 Apr 2020 19:52:50 +0200 [thread overview]
Message-ID: <20200420175250.25777-7-edgar.iglesias@gmail.com> (raw)
In-Reply-To: <20200420175250.25777-1-edgar.iglesias@gmail.com>
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Add the pvr-user2 property to control the user-defined
PVR1 User2 register.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
target/microblaze/cpu.c | 2 ++
target/microblaze/cpu.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 53027846c4..22d08dc8cb 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -196,6 +196,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
(cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0) |
cpu->cfg.pvr_user1;
+ env->pvr.regs[1] = cpu->cfg.pvr_user2;
env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |
(cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0) |
(cpu->cfg.use_hw_mul ? PVR2_USE_HW_MUL_MASK : 0) |
@@ -294,6 +295,7 @@ static Property mb_properties[] = {
DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
DEFINE_PROP_UINT8("pvr-user1", MicroBlazeCPU, cfg.pvr_user1, 0),
+ DEFINE_PROP_UINT32("pvr-user2", MicroBlazeCPU, cfg.pvr_user2, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 7bb5a3d6c6..a31134b65c 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -308,6 +308,7 @@ struct MicroBlazeCPU {
bool div_zero_exception;
bool unaligned_exceptions;
uint8_t pvr_user1;
+ uint32_t pvr_user2;
char *version;
uint8_t pvr;
} cfg;
--
2.20.1
prev parent reply other threads:[~2020-04-20 17:58 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-20 17:52 [PATCH v2 0/6] target-microblaze: Misc configurability #2 Edgar E. Iglesias
2020-04-20 17:52 ` [PATCH v2 1/6] target/microblaze: Add the opcode-0x0-illegal CPU property Edgar E. Iglesias
2020-04-20 17:52 ` [PATCH v2 2/6] target/microblaze: Add the ill-opcode-exception property Edgar E. Iglesias
2020-04-20 17:52 ` [PATCH v2 3/6] target/microblaze: Add the div-zero-exception property Edgar E. Iglesias
2020-04-20 17:57 ` Alistair Francis
2020-04-20 18:41 ` Luc Michel
2020-04-20 17:52 ` [PATCH v2 4/6] target/microblaze: Add the unaligned-exceptions property Edgar E. Iglesias
2020-04-20 17:52 ` [PATCH v2 5/6] target/microblaze: Add the pvr-user1 property Edgar E. Iglesias
2020-04-20 17:52 ` Edgar E. Iglesias [this message]
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