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From: Matthias Kaehlcke <mka@chromium.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: viresh.kumar@linaro.org, sboyd@kernel.org,
	bjorn.andersson@linaro.org, agross@kernel.org,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
	Alok Chauhan <alokc@codeaurora.org>,
	Akash Asthana <akashast@codeaurora.org>,
	linux-spi@vger.kernel.org
Subject: Re: [PATCH v3 02/17] spi: spi-geni-qcom: Use OPP API to set clk/perf state
Date: Tue, 28 Apr 2020 16:04:20 -0700	[thread overview]
Message-ID: <20200428230420.GJ4525@google.com> (raw)
In-Reply-To: <1588080785-6812-3-git-send-email-rnayak@codeaurora.org>

On Tue, Apr 28, 2020 at 07:02:50PM +0530, Rajendra Nayak wrote:
> geni spi needs to express a perforamnce state requirement on CX
> depending on the frequency of the clock rates. Use OPP table from
> DT to register with OPP framework and use dev_pm_opp_set_rate() to
> set the clk/perf state.
> 
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Alok Chauhan <alokc@codeaurora.org>
> Cc: Akash Asthana <akashast@codeaurora.org>
> Cc: linux-spi@vger.kernel.org
> ---
> This patch has a dependency on the 'PATCH 01/17' in this series,
> due to the changes in include/linux/qcom-geni-se.h
> Its ideal if this and the previous patch gets merged via the
> msm tree (once reviewed and ack'ed)
> Greg has already responded he is fine with it for serial.
> 
>  drivers/spi/spi-geni-qcom.c | 26 +++++++++++++++++++++++---
>  1 file changed, 23 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index c397242..51186c3 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -7,6 +7,7 @@
>  #include <linux/log2.h>
>  #include <linux/module.h>
>  #include <linux/platform_device.h>
> +#include <linux/pm_opp.h>
>  #include <linux/pm_runtime.h>
>  #include <linux/qcom-geni-se.h>
>  #include <linux/spi/spi.h>
> @@ -95,7 +96,6 @@ static int get_spi_clk_cfg(unsigned int speed_hz,
>  {
>  	unsigned long sclk_freq;
>  	unsigned int actual_hz;
> -	struct geni_se *se = &mas->se;
>  	int ret;
>  
>  	ret = geni_se_clk_freq_match(&mas->se,
> @@ -112,9 +112,9 @@ static int get_spi_clk_cfg(unsigned int speed_hz,
>  
>  	dev_dbg(mas->dev, "req %u=>%u sclk %lu, idx %d, div %d\n", speed_hz,
>  				actual_hz, sclk_freq, *clk_idx, *clk_div);
> -	ret = clk_set_rate(se->clk, sclk_freq);
> +	ret = dev_pm_opp_set_rate(mas->dev, sclk_freq);
>  	if (ret)
> -		dev_err(mas->dev, "clk_set_rate failed %d\n", ret);
> +		dev_err(mas->dev, "dev_pm_opp_set_rate failed %d\n", ret);
>  	return ret;
>  }
>  
> @@ -561,6 +561,17 @@ static int spi_geni_probe(struct platform_device *pdev)
>  	mas->se.wrapper = dev_get_drvdata(dev->parent);
>  	mas->se.base = base;
>  	mas->se.clk = clk;
> +	mas->se.opp_table = dev_pm_opp_set_clkname(&pdev->dev, "se");
> +	if (IS_ERR(mas->se.opp_table))
> +		return PTR_ERR(mas->se.opp_table);
> +	/* OPP table is optional */
> +	ret = dev_pm_opp_of_add_table(&pdev->dev);
> +	if (!ret) {
> +		mas->se.has_opp_table = true;
> +	} else if (ret != -ENODEV) {
> +		dev_err(&pdev->dev, "Invalid OPP table in Device tree\n");
> +		return ret;
> +	}
>  
>  	spi->bus_num = -1;
>  	spi->dev.of_node = dev->of_node;
> @@ -596,6 +607,9 @@ static int spi_geni_probe(struct platform_device *pdev)
>  spi_geni_probe_runtime_disable:
>  	pm_runtime_disable(dev);
>  	spi_master_put(spi);
> +	if (mas->se.has_opp_table)
> +		dev_pm_opp_of_remove_table(&pdev->dev);
> +	dev_pm_opp_put_clkname(mas->se.opp_table);
>  	return ret;
>  }
>  
> @@ -604,6 +618,9 @@ static int spi_geni_remove(struct platform_device *pdev)
>  	struct spi_master *spi = platform_get_drvdata(pdev);
>  	struct spi_geni_master *mas = spi_master_get_devdata(spi);
>  
> +	if (mas->se.has_opp_table)
> +		dev_pm_opp_of_remove_table(&pdev->dev);
> +	dev_pm_opp_put_clkname(mas->se.opp_table);
>  	/* Unregister _before_ disabling pm_runtime() so we stop transfers */
>  	spi_unregister_master(spi);
>  
> @@ -617,6 +634,9 @@ static int __maybe_unused spi_geni_runtime_suspend(struct device *dev)
>  	struct spi_master *spi = dev_get_drvdata(dev);
>  	struct spi_geni_master *mas = spi_master_get_devdata(spi);
>  
> +	/* Drop the performance state vote */
> +	dev_pm_opp_set_rate(dev, 0);
> +
>  	return geni_se_resources_off(&mas->se);
>  }

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

  reply	other threads:[~2020-04-28 23:04 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-28 13:32 [PATCH v3 00/17] DVFS for IO devices on sdm845 and sc7180 Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 01/17] tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-28 22:49   ` Matthias Kaehlcke
2020-04-28 13:32 ` [PATCH v3 02/17] spi: spi-geni-qcom: " Rajendra Nayak
2020-04-28 23:04   ` Matthias Kaehlcke [this message]
2020-04-28 13:32 ` [PATCH v3 03/17] arm64: dts: sdm845: Add OPP table for all qup devices Rajendra Nayak
2020-04-29  0:02   ` Matthias Kaehlcke
2020-04-29 14:15     ` Rajendra Nayak
2020-04-29 14:53       ` Rajendra Nayak
2020-04-29 16:10         ` Matthias Kaehlcke
2020-04-29 16:38           ` Rajendra Nayak
2020-04-30  6:15     ` Viresh Kumar
2020-04-28 13:32 ` [PATCH v3 04/17] arm64: dts: sc7180: " Rajendra Nayak
2020-06-25 15:17   ` Matthias Kaehlcke
2020-06-29 11:24     ` Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 05/17] drm/msm/dpu: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-28 13:32   ` Rajendra Nayak
2020-04-28 16:32   ` Rob Clark
2020-04-28 16:32     ` Rob Clark
2020-04-29 14:07     ` Rajendra Nayak
2020-04-29 14:07       ` Rajendra Nayak
2020-04-29  0:14   ` Matthias Kaehlcke
2020-04-29  0:14     ` Matthias Kaehlcke
2020-04-29 14:16     ` Rajendra Nayak
2020-04-29 14:16       ` Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 06/17] drm/msm: dsi: " Rajendra Nayak
2020-04-28 13:32   ` Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 07/17] arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains Rajendra Nayak
2020-04-29  0:27   ` Matthias Kaehlcke
2020-04-29 14:18     ` Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 08/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 09/17] mmc: sdhci-msm: Fix error handling for dev_pm_opp_of_add_table() Rajendra Nayak
2020-04-28 18:29   ` Ulf Hansson
2020-04-29 14:09     ` Rajendra Nayak
2020-05-05 11:33       ` Ulf Hansson
2020-05-05 13:32         ` Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 10/17] arm64: dts: sdm845: Add sdhc opps and power-domains Rajendra Nayak
2020-04-28 13:32 ` [PATCH v3 11/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-28 13:33 ` [PATCH v3 12/17] media: venus: core: Add support for opp tables/perf voting Rajendra Nayak
2020-04-29  0:39   ` Matthias Kaehlcke
2020-04-29 14:19     ` Rajendra Nayak
2020-04-29 14:36   ` Stanimir Varbanov
2020-04-29 15:10     ` Rajendra Nayak
2020-04-28 13:33 ` [PATCH v3 13/17] arm64: dts: sdm845: Add OPP tables and power-domains for venus Rajendra Nayak
2020-04-29  0:42   ` Matthias Kaehlcke
2020-04-28 13:33 ` [PATCH v3 14/17] arm64: dts: sc7180: " Rajendra Nayak
2020-04-28 13:33 ` [PATCH v3 15/17] spi: spi-qcom-qspi: Use OPP API to set clk/perf state Rajendra Nayak
2020-04-29  0:49   ` Matthias Kaehlcke
2020-04-29 14:21     ` Rajendra Nayak
2020-04-28 13:33 ` [PATCH v3 16/17] arm64: dts: sdm845: Add qspi opps and power-domains Rajendra Nayak
2020-04-29  0:52   ` Matthias Kaehlcke
2020-04-28 13:33 ` [PATCH v3 17/17] arm64: dts: sc7180: " Rajendra Nayak

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