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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, "Paul E. McKenney" <paulmck@kernel.org>,
	Andy Lutomirski <luto@kernel.org>,
	Alexandre Chartre <alexandre.chartre@oracle.com>,
	Frederic Weisbecker <frederic@kernel.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Petr Mladek <pmladek@suse.com>,
	Steven Rostedt <rostedt@goodmis.org>,
	Joel Fernandes <joel@joelfernandes.org>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Juergen Gross <jgross@suse.com>, Brian Gerst <brgerst@gmail.com>,
	Mathieu Desnoyers <mathieu.desnoyers@efficios.com>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	Will Deacon <will@kernel.org>
Subject: [patch V4 part 3 14/29] x86/entry: Convert Divide Error to IDTENTRY
Date: Tue, 05 May 2020 15:44:08 +0200	[thread overview]
Message-ID: <20200505134904.663914713@linutronix.de> (raw)
In-Reply-To: 20200505134354.774943181@linutronix.de

From: Thomas Gleixner <tglx@linutronix.de>

Convert #DE to IDTENTRY:
  - Implement the C entry point with DEFINE_IDTENTRY
  - Emit the ASM stub with DECLARE_IDTENTRY
  - Remove the ASM idtentry in 64bit
  - Remove the open coded ASM entry code in 32bit
  - Fixup the XEN/PV code

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
---
V2: Add comment to explain the DECLARE_IDTENTRY macro magic at the
    actual usage site.
---
 arch/x86/entry/entry_32.S       |    7 -------
 arch/x86/entry/entry_64.S       |    1 -
 arch/x86/include/asm/idtentry.h |   12 ++++++++++++
 arch/x86/include/asm/traps.h    |    3 ---
 arch/x86/kernel/idt.c           |    2 +-
 arch/x86/kernel/traps.c         |    7 ++++++-
 arch/x86/xen/enlighten_pv.c     |    7 ++++++-
 arch/x86/xen/xen-asm_64.S       |    2 +-
 8 files changed, 26 insertions(+), 15 deletions(-)

--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -1377,13 +1377,6 @@ SYM_CODE_START(alignment_check)
 	jmp	common_exception
 SYM_CODE_END(alignment_check)
 
-SYM_CODE_START(divide_error)
-	ASM_CLAC
-	pushl	$0				# no error code
-	pushl	$do_divide_error
-	jmp	common_exception
-SYM_CODE_END(divide_error)
-
 #ifdef CONFIG_X86_MCE
 SYM_CODE_START(machine_check)
 	ASM_CLAC
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1073,7 +1073,6 @@ apicinterrupt IRQ_WORK_VECTOR			irq_work
  * Exception entry points.
  */
 
-idtentry	X86_TRAP_DE		divide_error		do_divide_error			has_error_code=0
 idtentry	X86_TRAP_OF		overflow		do_overflow			has_error_code=0
 idtentry	X86_TRAP_BP		int3			do_int3				has_error_code=0
 idtentry	X86_TRAP_BR		bounds			do_bounds			has_error_code=0
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -67,4 +67,16 @@ static __always_inline void __##func(str
 
 #endif /* __ASSEMBLY__ */
 
+/*
+ * The actual entry points. Note that DECLARE_IDTENTRY*() serves two
+ * purposes:
+ *  - provide the function declarations when included from C-Code
+ *  - emit the ASM stubs when included from entry_32/64.S
+ *
+ * This avoids duplicate defines and ensures that everything is consistent.
+ */
+
+/* Simple exception entry points. No hardware error code */
+DECLARE_IDTENTRY(X86_TRAP_DE,		exc_divide_error);
+
 #endif
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -11,7 +11,6 @@
 
 #define dotraplinkage __visible
 
-asmlinkage void divide_error(void);
 asmlinkage void debug(void);
 asmlinkage void nmi(void);
 asmlinkage void int3(void);
@@ -38,7 +37,6 @@ asmlinkage void machine_check(void);
 asmlinkage void simd_coprocessor_error(void);
 
 #if defined(CONFIG_X86_64) && defined(CONFIG_XEN_PV)
-asmlinkage void xen_divide_error(void);
 asmlinkage void xen_xennmi(void);
 asmlinkage void xen_xendebug(void);
 asmlinkage void xen_int3(void);
@@ -62,7 +60,6 @@ asmlinkage void xen_machine_check(void);
 asmlinkage void xen_simd_coprocessor_error(void);
 #endif
 
-dotraplinkage void do_divide_error(struct pt_regs *regs, long error_code);
 dotraplinkage void do_debug(struct pt_regs *regs, long error_code);
 dotraplinkage void do_nmi(struct pt_regs *regs, long error_code);
 dotraplinkage void do_int3(struct pt_regs *regs, long error_code);
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -70,7 +70,7 @@ static const __initconst struct idt_data
  * set up TSS.
  */
 static const __initconst struct idt_data def_idts[] = {
-	INTG(X86_TRAP_DE,		divide_error),
+	INTG(X86_TRAP_DE,		asm_exc_divide_error),
 	INTG(X86_TRAP_NMI,		nmi),
 	INTG(X86_TRAP_BR,		bounds),
 	INTG(X86_TRAP_UD,		invalid_op),
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -210,6 +210,12 @@ static __always_inline void __user *erro
 	return (void __user *)uprobe_get_trap_addr(regs);
 }
 
+DEFINE_IDTENTRY(exc_divide_error)
+{
+	do_error_trap(regs, 0, "divide_error", X86_TRAP_DE, SIGFPE,
+		      FPE_INTDIV, error_get_trap_addr(regs));
+}
+
 #define IP ((void __user *)uprobe_get_trap_addr(regs))
 #define DO_ERROR(trapnr, signr, sicode, addr, str, name)		   \
 dotraplinkage void do_##name(struct pt_regs *regs, long error_code)	   \
@@ -217,7 +223,6 @@ dotraplinkage void do_##name(struct pt_r
 	do_error_trap(regs, error_code, str, trapnr, signr, sicode, addr); \
 }
 
-DO_ERROR(X86_TRAP_DE,     SIGFPE,  FPE_INTDIV,   IP, "divide error",        divide_error)
 DO_ERROR(X86_TRAP_OF,     SIGSEGV,          0, NULL, "overflow",            overflow)
 DO_ERROR(X86_TRAP_UD,     SIGILL,  ILL_ILLOPN,   IP, "invalid opcode",      invalid_op)
 DO_ERROR(X86_TRAP_OLD_MF, SIGFPE,           0, NULL, "coprocessor segment overrun", coprocessor_segment_overrun)
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -605,6 +605,11 @@ struct trap_array_entry {
 	bool ist_okay;
 };
 
+#define TRAP_ENTRY(func, ist_ok) {			\
+	.orig		= asm_##func,			\
+	.xen		= xen_asm_##func,		\
+	.ist_okay	= ist_ok }
+
 static struct trap_array_entry trap_array[] = {
 	{ debug,                       xen_xendebug,                    true },
 	{ double_fault,                xen_double_fault,                true },
@@ -618,7 +623,7 @@ static struct trap_array_entry trap_arra
 	{ entry_INT80_compat,          xen_entry_INT80_compat,          false },
 #endif
 	{ page_fault,                  xen_page_fault,                  false },
-	{ divide_error,                xen_divide_error,                false },
+	TRAP_ENTRY(exc_divide_error,			false ),
 	{ bounds,                      xen_bounds,                      false },
 	{ invalid_op,                  xen_invalid_op,                  false },
 	{ device_not_available,        xen_device_not_available,        false },
--- a/arch/x86/xen/xen-asm_64.S
+++ b/arch/x86/xen/xen-asm_64.S
@@ -28,7 +28,7 @@ SYM_CODE_END(xen_\name)
 _ASM_NOKPROBE(xen_\name)
 .endm
 
-xen_pv_trap divide_error
+xen_pv_trap asm_exc_divide_error
 xen_pv_trap debug
 xen_pv_trap xendebug
 xen_pv_trap int3


  parent reply	other threads:[~2020-05-05 14:15 UTC|newest]

Thread overview: 129+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-05 13:43 [patch V4 part 3 00/29] x86/entry: Entry/exception code rework, simple exceptions Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 01/29] x86/traps: Mark fixup_bad_iret() noinstr Thomas Gleixner
2020-05-09  0:39   ` Andy Lutomirski
2020-05-13  1:51     ` Steven Rostedt
2020-05-14  0:41       ` Mathieu Desnoyers
2020-05-14  1:35         ` Andy Lutomirski
2020-05-11 12:28   ` Masami Hiramatsu
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 02/29] x86/traps: Mark sync_regs() noinstr Thomas Gleixner
2020-05-09  0:39   ` Andy Lutomirski
2020-05-11 12:08   ` Masami Hiramatsu
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 03/29] x86/entry: Disable interrupts for native_load_gs_index() in C code Thomas Gleixner
2020-05-09  0:40   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 04/29] x86/traps: Make interrupt enable/disable symmetric " Thomas Gleixner
2020-05-07 15:25   ` Alexandre Chartre
2020-05-07 17:14     ` Thomas Gleixner
2020-05-09  0:44   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 05/29] x86/traps: Split trap numbers out in a seperate header Thomas Gleixner
2020-05-07 15:34   ` Alexandre Chartre
2020-05-19 19:58   ` [tip: x86/entry] x86/traps: Split trap numbers out in a separate header tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 06/29] x86/entry/64: Reorder idtentries Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 07/29] x86/entry: Distangle idtentry Thomas Gleixner
2020-05-10 20:31   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 08/29] x86/entry/64: Provide sane error entry/exit Thomas Gleixner
2020-05-10 21:02   ` Andy Lutomirski
2020-05-13  2:10   ` Steven Rostedt
2020-05-13  6:35     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 09/29] x86/entry/32: Provide macro to emit IDT entry stubs Thomas Gleixner
2020-05-11  0:55   ` Andy Lutomirski
2020-05-14  1:44   ` Mathieu Desnoyers
2020-05-14  4:31     ` Andy Lutomirski
2020-05-14 13:38       ` Mathieu Desnoyers
2020-05-14 14:08         ` Thomas Gleixner
2020-05-14 14:43           ` Mathieu Desnoyers
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 10/29] x86/idtentry: Provide macros to define/declare IDT entry points Thomas Gleixner
2020-05-11  0:58   ` Andy Lutomirski
2020-05-11 10:39     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 11/29] rcu: Provide rcu_irq_exit_preempt() Thomas Gleixner
2020-05-05 22:02   ` Paul E. McKenney
2020-05-05 22:05     ` Thomas Gleixner
2020-05-05 22:24       ` Paul E. McKenney
2020-05-14  1:03   ` Mathieu Desnoyers
2020-05-14  2:41   ` Joel Fernandes
2020-05-14  2:46     ` Joel Fernandes
2020-05-14 14:43     ` Thomas Gleixner
2020-05-15 19:00       ` Joel Fernandes
2020-05-19 19:52   ` [tip: core/rcu] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 12/29] x86/entry/common: Provide idtentry_enter/exit() Thomas Gleixner
2020-05-07 16:27   ` Alexandre Chartre
2020-05-11  4:34   ` Andy Lutomirski
2020-05-11 10:59     ` [patch V5 " Thomas Gleixner
2020-05-11 15:31       ` Andy Lutomirski
2020-05-11 18:42         ` Thomas Gleixner
2020-05-12 16:49           ` [patch V6 " Thomas Gleixner
2020-05-14  0:51             ` Andy Lutomirski
2020-05-14  1:08   ` [patch V4 " Mathieu Desnoyers
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 13/29] x86/traps: Prepare for using DEFINE_IDTENTRY Thomas Gleixner
2020-05-14  4:37   ` Andy Lutomirski
2020-05-14 12:16     ` Thomas Gleixner
2020-05-14 12:33       ` Peter Zijlstra
2020-05-15 13:42       ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` Thomas Gleixner [this message]
2020-05-14  4:38   ` [patch V4 part 3 14/29] x86/entry: Convert Divide Error to IDTENTRY Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-10-11 15:25     ` Dmitry Vyukov
2020-10-11 17:50       ` Thomas Gleixner
2020-10-12 13:19       ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-10-12 20:30       ` [tip: x86/entry] x86/entry: Convert Divide Error to IDTENTRY Kees Cook
2020-10-13 10:19         ` Dmitry Vyukov
2020-10-13 17:41       ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 15/29] x86/entry: Convert Overflow exception to IDTENTRY Thomas Gleixner
2020-05-14  4:39   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 16/29] x86/entry: Convert Bounds " Thomas Gleixner
2020-05-14  4:42   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 17/29] x86/entry: Convert Invalid Opcode " Thomas Gleixner
2020-05-14  4:45   ` Andy Lutomirski
2020-05-14 12:33     ` Thomas Gleixner
2020-05-14 15:00       ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 18/29] x86/entry: Convert Device not available " Thomas Gleixner
2020-05-14  4:45   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 19/29] x86/entry: Convert Coprocessor segment overrun " Thomas Gleixner
2020-05-14  4:46   ` Andy Lutomirski
2020-05-05 13:44 ` [patch V4 part 3 20/29] x86/entry: Provide IDTENTRY_ERRORCODE Thomas Gleixner
2020-05-14  4:46   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] x86/idtentry: " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 21/29] x86/entry: Convert Invalid TSS exception to IDTENTRY Thomas Gleixner
2020-05-14  4:48   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 22/29] x86/entry: Convert Segment not present " Thomas Gleixner
2020-05-14  4:47   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 23/29] x86/entry: Convert Stack segment " Thomas Gleixner
2020-05-14  4:49   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 24/29] x86/entry: Convert General protection " Thomas Gleixner
2020-05-14  4:50   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 25/29] x86/entry: Convert Spurious interrupt bug " Thomas Gleixner
2020-05-14  4:47   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 26/29] x86/entry: Convert Coprocessor error " Thomas Gleixner
2020-05-14  4:49   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] x86/entry: Convert Coprocessor segment overrun " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 27/29] x86/entry: Convert Alignment check " Thomas Gleixner
2020-05-14  4:50   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 28/29] x86/entry: Convert SIMD coprocessor error " Thomas Gleixner
2020-05-14  4:56   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 29/29] x86/entry/32: Convert IRET exception to IDTENTRY_SW Thomas Gleixner
2020-05-07 16:47   ` Alexandre Chartre
2020-05-14  4:54   ` Andy Lutomirski
2020-05-15 14:11     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner

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