From: Jordan Niethe <jniethe5@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: alistair@popple.id.au, Jordan Niethe <jniethe5@gmail.com>,
bala24@linux.ibm.com
Subject: [PATCH 2/5] powerpc sstep: Add tests for prefixed floating-point load/stores
Date: Mon, 25 May 2020 12:59:20 +1000 [thread overview]
Message-ID: <20200525025923.19843-2-jniethe5@gmail.com> (raw)
In-Reply-To: <20200525025923.19843-1-jniethe5@gmail.com>
Add tests for the prefixed versions of the floating-point load/stores
that are currently tested. This includes the following instructions:
* Prefixed Load Floating-Point Single (plfs)
* Prefixed Load Floating-Point Double (plfd)
* Prefixed Store Floating-Point Single (pstfs)
* Prefixed Store Floating-Point Double (pstfd)
Skip the new tests if ISA v3.10 is unsupported.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
---
arch/powerpc/include/asm/ppc-opcode.h | 4 +
arch/powerpc/lib/test_emulate_step.c | 136 ++++++++++++++++++++++++++
2 files changed, 140 insertions(+)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 9e3ecb42597e..6b5edec0e347 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -371,9 +371,13 @@
#define PPC_INST_LBZCIX 0x7c0006aa
#define PPC_INST_STBCIX 0x7c0007aa
#define PPC_INST_LWZX 0x7c00002e
+#define PPC_INST_LFS 0xc0000000
#define PPC_INST_LFSX 0x7c00042e
+#define PPC_INST_STFS 0xd0000000
#define PPC_INST_STFSX 0x7c00052e
+#define PPC_INST_LFD 0xc8000000
#define PPC_INST_LFDX 0x7c0004ae
+#define PPC_INST_STFD 0xd8000000
#define PPC_INST_STFDX 0x7c0005ae
#define PPC_INST_LVX 0x7c0000ce
#define PPC_INST_STVX 0x7c0001ce
diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c
index 8d8953b5fe90..9599f3a03ca1 100644
--- a/arch/powerpc/lib/test_emulate_step.c
+++ b/arch/powerpc/lib/test_emulate_step.c
@@ -57,12 +57,40 @@
___PPC_RA(a) | ___PPC_RB(b))
#define TEST_LFSX(t, a, b) ppc_inst(PPC_INST_LFSX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b))
+#define TEST_PLFS(r, base, i, pr) ppc_inst_prefix(PPC_PREFIX_MLS | \
+ __PPC_PRFX_R(pr) | \
+ IMM_H(i), \
+ PPC_INST_LFS | \
+ ___PPC_RT(r) | \
+ ___PPC_RA(base) | \
+ IMM_L(i))
#define TEST_STFSX(s, a, b) ppc_inst(PPC_INST_STFSX | ___PPC_RS(s) | \
___PPC_RA(a) | ___PPC_RB(b))
+#define TEST_PSTFS(r, base, i, pr) ppc_inst_prefix(PPC_PREFIX_MLS | \
+ __PPC_PRFX_R(pr) | \
+ IMM_H(i), \
+ PPC_INST_STFS | \
+ ___PPC_RT(r) | \
+ ___PPC_RA(base) | \
+ IMM_L(i))
#define TEST_LFDX(t, a, b) ppc_inst(PPC_INST_LFDX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b))
+#define TEST_PLFD(r, base, i, pr) ppc_inst_prefix(PPC_PREFIX_MLS | \
+ __PPC_PRFX_R(pr) | \
+ IMM_H(i), \
+ PPC_INST_LFD | \
+ ___PPC_RT(r) | \
+ ___PPC_RA(base) | \
+ IMM_L(i))
#define TEST_STFDX(s, a, b) ppc_inst(PPC_INST_STFDX | ___PPC_RS(s) | \
___PPC_RA(a) | ___PPC_RB(b))
+#define TEST_PSTFD(r, base, i, pr) ppc_inst_prefix(PPC_PREFIX_MLS | \
+ __PPC_PRFX_R(pr) | \
+ IMM_H(i), \
+ PPC_INST_STFD | \
+ ___PPC_RT(r) | \
+ ___PPC_RA(base) | \
+ IMM_L(i))
#define TEST_LVX(t, a, b) ppc_inst(PPC_INST_LVX | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b))
#define TEST_STVX(s, a, b) ppc_inst(PPC_INST_STVX | ___PPC_RS(s) | \
@@ -357,6 +385,53 @@ static void __init test_lfsx_stfsx(void)
show_result("stfsx", "FAIL");
}
+static void __init test_plfs_pstfs(void)
+{
+ struct pt_regs regs;
+ union {
+ float a;
+ int b;
+ } c;
+ int cached_b;
+ int stepped = -1;
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_31)) {
+ show_result("pld", "SKIP (!CPU_FTR_ARCH_31)");
+ return;
+ }
+
+ init_pt_regs(®s);
+
+
+ /*** plfs ***/
+
+ c.a = 123.45;
+ cached_b = c.b;
+
+ regs.gpr[3] = (unsigned long)&c.a;
+
+ /* plfs frt10, 0(r3), 0 */
+ stepped = emulate_step(®s, TEST_PLFS(10, 3, 0, 0));
+
+ if (stepped == 1)
+ show_result("plfs", "PASS");
+ else
+ show_result("plfs", "FAIL");
+
+
+ /*** pstfs ***/
+
+ c.a = 678.91;
+
+ /* pstfs frs10, 0(r3), 0 */
+ stepped = emulate_step(®s, TEST_PSTFS(10, 3, 0, 0));
+
+ if (stepped == 1 && c.b == cached_b)
+ show_result("pstfs", "PASS");
+ else
+ show_result("pstfs", "FAIL");
+}
+
static void __init test_lfdx_stfdx(void)
{
struct pt_regs regs;
@@ -399,6 +474,53 @@ static void __init test_lfdx_stfdx(void)
else
show_result("stfdx", "FAIL");
}
+
+static void __init test_plfd_pstfd(void)
+{
+ struct pt_regs regs;
+ union {
+ double a;
+ long b;
+ } c;
+ long cached_b;
+ int stepped = -1;
+
+ if (!cpu_has_feature(CPU_FTR_ARCH_31)) {
+ show_result("pld", "SKIP (!CPU_FTR_ARCH_31)");
+ return;
+ }
+
+ init_pt_regs(®s);
+
+
+ /*** plfd ***/
+
+ c.a = 123456.78;
+ cached_b = c.b;
+
+ regs.gpr[3] = (unsigned long)&c.a;
+
+ /* plfd frt10, 0(r3), 0 */
+ stepped = emulate_step(®s, TEST_PLFD(10, 3, 0, 0));
+
+ if (stepped == 1)
+ show_result("plfd", "PASS");
+ else
+ show_result("plfd", "FAIL");
+
+
+ /*** pstfd ***/
+
+ c.a = 987654.32;
+
+ /* pstfd frs10, 0(r3), 0 */
+ stepped = emulate_step(®s, TEST_PSTFD(10, 3, 0, 0));
+
+ if (stepped == 1 && c.b == cached_b)
+ show_result("pstfd", "PASS");
+ else
+ show_result("pstfd", "FAIL");
+}
#else
static void __init test_lfsx_stfsx(void)
{
@@ -406,11 +528,23 @@ static void __init test_lfsx_stfsx(void)
show_result("stfsx", "SKIP (CONFIG_PPC_FPU is not set)");
}
+static void __init test_plfs_pstfs(void)
+{
+ show_result("plfs", "SKIP (CONFIG_PPC_FPU is not set)");
+ show_result("pstfs", "SKIP (CONFIG_PPC_FPU is not set)");
+}
+
static void __init test_lfdx_stfdx(void)
{
show_result("lfdx", "SKIP (CONFIG_PPC_FPU is not set)");
show_result("stfdx", "SKIP (CONFIG_PPC_FPU is not set)");
}
+
+static void __init test_plfd_pstfd(void)
+{
+ show_result("plfd", "SKIP (CONFIG_PPC_FPU is not set)");
+ show_result("pstfd", "SKIP (CONFIG_PPC_FPU is not set)");
+}
#endif /* CONFIG_PPC_FPU */
#ifdef CONFIG_ALTIVEC
@@ -547,7 +681,9 @@ static void __init run_tests_load_store(void)
test_pstd();
test_ldarx_stdcx();
test_lfsx_stfsx();
+ test_plfs_pstfs();
test_lfdx_stfdx();
+ test_plfd_pstfd();
test_lvx_stvx();
test_lxvd2x_stxvd2x();
}
--
2.17.1
next prev parent reply other threads:[~2020-05-25 3:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 2:59 [PATCH 1/5] powerpc sstep: Add tests for prefixed integer load/stores Jordan Niethe
2020-05-25 2:59 ` Jordan Niethe [this message]
2020-05-25 2:59 ` [PATCH 3/5] powerpc sstep: Set NIP in instruction emulation tests Jordan Niethe
2020-05-25 2:59 ` [PATCH 4/5] powerpc sstep: Let compute tests specify a required cpu feature Jordan Niethe
2020-05-25 2:59 ` [PATCH 5/5] powerpc sstep: Add tests for Prefixed Add Immediate Jordan Niethe
2020-07-22 1:26 ` Jordan Niethe
2020-07-22 5:47 ` Michael Ellerman
2020-07-24 13:24 ` [PATCH 1/5] powerpc sstep: Add tests for prefixed integer load/stores Michael Ellerman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200525025923.19843-2-jniethe5@gmail.com \
--to=jniethe5@gmail.com \
--cc=alistair@popple.id.au \
--cc=bala24@linux.ibm.com \
--cc=linuxppc-dev@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.