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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON
Date: Mon, 15 Jun 2020 23:52:33 +0300	[thread overview]
Message-ID: <20200615205233.GS6112@intel.com> (raw)
In-Reply-To: <E7C9878FBA1C6D42A1CA3F62AEB6945F8255F3E0@BGSMSX104.gar.corp.intel.com>

On Mon, Jun 15, 2020 at 08:39:55PM +0000, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Thursday, June 11, 2020 9:31 PM
> > To: Shankar, Uma <uma.shankar@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; jani.nikula@linux.intel.com; Mun, Gwan-
> > gyeong <gwan-gyeong.mun@intel.com>
> > Subject: Re: [v3 6/8] drm/i915/display: Implement infoframes readback for
> > LSPCON
> > 
> > On Thu, Jun 11, 2020 at 06:46:50PM +0300, Ville Syrjälä wrote:
> > > On Thu, Jun 11, 2020 at 12:42:30AM +0530, Uma Shankar wrote:
> > > > Implemented Infoframes enabled readback for LSPCON devices.
> > > > This will help align the implementation with state readback
> > > > infrastructure.
> > > >
> > > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_lspcon.c | 63
> > > > ++++++++++++++++++++-
> > > >  1 file changed, 61 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > index 9034ce6f20b9..0ebe9a700291 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> > > > @@ -576,11 +576,70 @@ void lspcon_set_infoframes(struct intel_encoder
> > *encoder,
> > > >  				  buf, ret);
> > > >  }
> > > >
> > > > +static bool _lspcon_read_avi_infoframe_enabled_mca(struct
> > > > +drm_dp_aux *aux) {
> > > > +	int ret;
> > > > +	u32 val = 0;
> > > > +	u16 reg = LSPCON_MCA_AVI_IF_CTRL;
> > > > +
> > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > +	if (ret < 0) {
> > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > +		return false;
> > > > +	}
> > > > +
> > > > +	if (val & LSPCON_MCA_AVI_IF_KICKOFF)
> > > > +		return true;
> > > > +
> > > > +	return false;
> > >
> > > return val & ...;
> > >
> > > > +}
> > > > +
> > > > +static bool _lspcon_read_avi_infoframe_enabled_parade(struct
> > > > +drm_dp_aux *aux) {
> > > > +	int ret;
> > > > +	u32 val = 0;
> > > > +	u16 reg = LSPCON_PARADE_AVI_IF_CTRL;
> > > > +
> > > > +	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
> > > > +	if (ret < 0) {
> > > > +		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
> > > > +		return false;
> > > > +	}
> > > > +
> > > > +	if (val & LSPCON_PARADE_AVI_IF_KICKOFF)
> > > > +		return true;
> > > > +
> > > > +	return false;
> > > > +}
> > > > +
> > > >  u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> > > >  			      const struct intel_crtc_state *pipe_config)  {
> > > > -	/* FIXME actually read this from the hw */
> > > > -	return 0;
> > > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > > +	struct intel_lspcon *lspcon = enc_to_intel_lspcon(encoder);
> > > > +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > > +	bool infoframes_enabled;
> > > > +	u32 mask = 0;
> > > > +	u32 val;
> > > > +
> > > > +	if (lspcon->vendor == LSPCON_VENDOR_MCA)
> > > > +		infoframes_enabled =
> > _lspcon_read_avi_infoframe_enabled_mca(&intel_dp->aux);
> > > > +	else
> > > > +		infoframes_enabled =
> > > > +_lspcon_read_avi_infoframe_enabled_parade(&intel_dp->aux);
> > > > +
> > > > +	if (infoframes_enabled)
> > > > +		return true;
> > >
> > > This is supposed to return a bitmask of all enabled infoframes.
> 
> > Actually since we're dealing with both the LSPCON specific stuff and DIP stuff for
> > the DRM infoframe I think we should stop using using
> > intel_hdmi_infoframes_enabled(), and instead provide a LSPCON specific
> > replacement for it. That way we can directly return the abstract bitmask instead
> > of pretending to return a bitmask of the DIP bits.
> 
> Sure,  will fix this and resend the next version.
> 
> > >
> > > Also my question "how do we turn off infoframes once enabled?"
> > > from
> > > https://patchwork.freedesktop.org/patch/351719/?series=72928&rev=1
> > > still remains unanswered...
> 
> For the AVI infoframe we generally compute and change the respective values. If no change is
> requested and computed we can let the existing infoframes be transmitted. AFAIK there is no
> mechanism called out, to explicitly disable this on Lspcon. Have not seen any issues due to this,
> so hoping that it may be safe even if they are enabled.

It's not valid to transmit infoframes to DVI sinks.

> 
> I am planning to take your patch from the series and float along with this series, adding check for DRM
> Infoframes also. Hope that is ok ?
> 
> Thanks Ville for your feedback.
> 
> Regards,
> Uma Shankar
> 
> > > > +
> > > > +	if (lspcon->hdr_supported) {
> > > > +		val = intel_de_read(dev_priv,
> > > > +				    HSW_TVIDEO_DIP_CTL(pipe_config-
> > >cpu_transcoder));
> > > > +		mask |= VIDEO_DIP_ENABLE_GMP_HSW;
> > > > +
> > > > +		if (val & mask)
> > > > +			return val & mask;
> > > > +	}
> > > > +
> > > > +	return false;
> > > >  }
> > > >
> > > >  void lspcon_resume(struct intel_lspcon *lspcon)
> > > > --
> > > > 2.22.0
> > >
> > > --
> > > Ville Syrjälä
> > > Intel
> > 
> > --
> > Ville Syrjälä
> > Intel

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-06-15 20:52 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-10 19:12 [Intel-gfx] [v3 0/8] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 1/8] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 2/8] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 3/8] drm/i915/display: Attach HDR property for capable Gen9 devices Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 4/8] drm/i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 5/8] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 6/8] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-06-11 15:46   ` Ville Syrjälä
2020-06-11 16:01     ` Ville Syrjälä
2020-06-15 20:39       ` Shankar, Uma
2020-06-15 20:52         ` Ville Syrjälä [this message]
2020-06-15 21:03           ` Shankar, Uma
2020-06-22 11:44             ` Shankar, Uma
2020-06-22 17:02               ` Ville Syrjälä
2020-06-22 17:17                 ` Shankar, Uma
2020-06-22 17:21                   ` Shankar, Uma
2020-06-22 19:39                     ` Ville Syrjälä
2020-06-22 20:05                       ` Shankar, Uma
2020-06-22 17:40                   ` Ville Syrjälä
2020-06-22 18:25                     ` Shankar, Uma
2020-06-10 19:12 ` [Intel-gfx] [v3 7/8] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-06-10 19:12 ` [Intel-gfx] [v3 8/8] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp " Uma Shankar
2020-06-10 19:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev3) Patchwork
2020-06-10 19:52 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-06-11  5:08   ` Shankar, Uma
2020-06-11  5:51     ` Vudum, Lakshminarayana
2020-06-11  5:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-06-11 12:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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