From: Roger Pau Monne <roger.pau@citrix.com>
To: <xen-devel@lists.xenproject.org>
Cc: Roger Pau Monne <roger.pau@citrix.com>,
Jan Beulich <jbeulich@suse.com>,
Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>
Subject: [PATCH v3 2/8] x86/svm: silently drop writes to SYSCFG and related MSRs
Date: Tue, 1 Sep 2020 12:54:39 +0200 [thread overview]
Message-ID: <20200901105445.22277-3-roger.pau@citrix.com> (raw)
In-Reply-To: <20200901105445.22277-1-roger.pau@citrix.com>
The SYSCFG, TOP_MEM1 and TOP_MEM2 MSRs are currently exposed to guests
and writes are silently discarded. Make this explicit in the SVM code
now, and just return default constant values when attempting to read
any of the MSRs, while continuing to silently drop writes.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Changes since v2:
- Return 0 from SYSCFG.
- Merge switch cases.
Changes sincxe v1:
- Return MtrrFixDramEn in MSR_K8_SYSCFG.
---
xen/arch/x86/hvm/svm/svm.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index ca3bbfcbb3..af584ff5d1 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1917,6 +1917,9 @@ static int svm_msr_read_intercept(unsigned int msr, uint64_t *msr_content)
goto gpf;
break;
+ case MSR_K8_SYSCFG:
+ case MSR_K8_TOP_MEM1:
+ case MSR_K8_TOP_MEM2:
case MSR_K8_VM_CR:
*msr_content = 0;
break;
@@ -2094,6 +2097,9 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content)
goto gpf;
break;
+ case MSR_K8_TOP_MEM1:
+ case MSR_K8_TOP_MEM2:
+ case MSR_K8_SYSCFG:
case MSR_K8_VM_CR:
/* ignore write. handle all bits as read-only. */
break;
--
2.28.0
next prev parent reply other threads:[~2020-09-01 11:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-01 10:54 [PATCH v3 0/8] x86: switch default MSR behavior Roger Pau Monne
2020-09-01 10:54 ` [PATCH v3 1/8] x86/vmx: handle writes to MISC_ENABLE MSR Roger Pau Monne
2020-09-04 8:34 ` Jan Beulich
2020-09-07 3:25 ` Tian, Kevin
2020-09-07 7:22 ` Jan Beulich
2020-09-01 10:54 ` Roger Pau Monne [this message]
2020-09-04 8:36 ` [PATCH v3 2/8] x86/svm: silently drop writes to SYSCFG and related MSRs Jan Beulich
2020-09-04 9:47 ` Andrew Cooper
2020-09-01 10:54 ` [PATCH v3 3/8] x86/msr: explicitly handle AMD DE_CFG Roger Pau Monne
2020-09-02 20:49 ` Andrew Cooper
2020-09-01 10:54 ` [PATCH v3 4/8] x86/svm: handle BU_CFG and BU_CFG2 with cases Roger Pau Monne
2020-09-02 21:02 ` Andrew Cooper
2020-09-03 8:15 ` Roger Pau Monné
2020-09-04 8:39 ` Jan Beulich
2020-09-03 8:29 ` Jan Beulich
2020-09-01 10:54 ` [PATCH v3 5/8] x86/pv: allow reading FEATURE_CONTROL MSR Roger Pau Monne
2020-09-02 20:56 ` Andrew Cooper
2020-09-03 13:33 ` Roger Pau Monné
2020-09-03 14:06 ` Andrew Cooper
2020-09-03 14:10 ` Roger Pau Monné
2020-09-01 10:54 ` [PATCH v3 6/8] x86/pv: disallow access to unknown MSRs Roger Pau Monne
2020-09-01 10:54 ` [PATCH v3 7/8] x86/hvm: Disallow " Roger Pau Monne
2020-09-04 8:53 ` Jan Beulich
2020-09-04 9:44 ` Andrew Cooper
2020-09-04 9:58 ` Jan Beulich
2020-09-04 11:13 ` Roger Pau Monné
2020-09-07 3:31 ` Tian, Kevin
2020-09-01 10:54 ` [PATCH v3 8/8] x86/msr: Drop compatibility #GP handling in guest_{rd, wr}msr() Roger Pau Monne
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