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From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Jan Beulich" <JBeulich@suse.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>
Subject: [PATCH 2/5] x86/asm: Split __wr{fs, gs}base() out of write_{fs, gs}_base()
Date: Wed, 9 Sep 2020 10:59:17 +0100	[thread overview]
Message-ID: <20200909095920.25495-3-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <20200909095920.25495-1-andrew.cooper3@citrix.com>

To match the read side which is already split out.  A future change will want
to use them.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Wei Liu <wl@xen.org>
---
 xen/include/asm-x86/msr.h | 30 ++++++++++++++++++++----------
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
index 5e141ac5a5..16f95e7344 100644
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -156,6 +156,24 @@ static inline unsigned long __rdgsbase(void)
     return base;
 }
 
+static inline void __wrfsbase(unsigned long base)
+{
+#ifdef HAVE_AS_FSGSBASE
+    asm volatile ( "wrfsbase %0" :: "r" (base) );
+#else
+    asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd0" :: "a" (base) );
+#endif
+}
+
+static inline void __wrgsbase(unsigned long base)
+{
+#ifdef HAVE_AS_FSGSBASE
+    asm volatile ( "wrgsbase %0" :: "r" (base) );
+#else
+    asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd8" :: "a" (base) );
+#endif
+}
+
 static inline unsigned long read_fs_base(void)
 {
     unsigned long base;
@@ -199,11 +217,7 @@ static inline unsigned long read_gs_shadow(void)
 static inline void write_fs_base(unsigned long base)
 {
     if ( read_cr4() & X86_CR4_FSGSBASE )
-#ifdef HAVE_AS_FSGSBASE
-        asm volatile ( "wrfsbase %0" :: "r" (base) );
-#else
-        asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd0" :: "a" (base) );
-#endif
+        __wrfsbase(base);
     else
         wrmsrl(MSR_FS_BASE, base);
 }
@@ -211,11 +225,7 @@ static inline void write_fs_base(unsigned long base)
 static inline void write_gs_base(unsigned long base)
 {
     if ( read_cr4() & X86_CR4_FSGSBASE )
-#ifdef HAVE_AS_FSGSBASE
-        asm volatile ( "wrgsbase %0" :: "r" (base) );
-#else
-        asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd8" :: "a" (base) );
-#endif
+        __wrgsbase(base);
     else
         wrmsrl(MSR_GS_BASE, base);
 }
-- 
2.11.0



  parent reply	other threads:[~2020-09-09 10:00 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-09  9:59 [PATCH 0/5] x86/pv: Minor perf improvements in segment handling Andrew Cooper
2020-09-09  9:59 ` [PATCH 1/5] x86/asm: Rename FS/GS base helpers Andrew Cooper
2020-09-10 14:45   ` Jan Beulich
2020-09-15  2:50   ` Tian, Kevin
2020-09-09  9:59 ` Andrew Cooper [this message]
2020-09-10 14:47   ` [PATCH 2/5] x86/asm: Split __wr{fs,gs}base() out of write_{fs,gs}_base() Jan Beulich
2020-09-14 14:34     ` Andrew Cooper
2020-09-09  9:59 ` [PATCH 3/5] x86/pv: Optimise prefetching in svm_load_segs() Andrew Cooper
2020-09-10 14:57   ` Jan Beulich
2020-09-10 20:30     ` Andrew Cooper
2020-09-11  6:31       ` Jan Beulich
2020-09-09  9:59 ` [PATCH 4/5] x86/pv: Optimise to the segment context switching paths Andrew Cooper
2020-09-11  9:49   ` Jan Beulich
2020-09-11 12:53     ` Andrew Cooper
2020-09-11 13:28       ` Jan Beulich
2020-09-09  9:59 ` [PATCH 5/5] x86/pv: Simplify emulation for the 64bit base MSRs Andrew Cooper
2020-09-11 10:01   ` Jan Beulich
2020-09-11 16:10     ` Andrew Cooper

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