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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Mark Brown <broonie@kernel.org>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>,
	Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Feng Tang <feng.tang@intel.com>, Vinod Koul <vkoul@kernel.org>,
	<linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 05/11] spi: dw-dma: Move DMA transfers submission to the channels prep methods
Date: Sun, 20 Sep 2020 14:23:16 +0300	[thread overview]
Message-ID: <20200920112322.24585-6-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20200920112322.24585-1-Sergey.Semin@baikalelectronics.ru>

Indeed we can freely move the dmaengine_submit() method invocation and the
Tx and Rx busy flag setting into the DMA Tx/Rx prepare methods. Since the
Tx/Rx preparation method is now mainly used for the DMA transfers
submission, here we suggest to rename it to have the _submit_{r,t}x suffix
instead.

By having this alteration applied first we implement another code
preparation before adding the one-by-one DMA SG entries transmission,
second we now have the dma_async_tx_descriptor descriptor used locally
only in the new DMA transfers submission methods (this will be cleaned up
a bit later), third we make the generic transfer method more readable,
where now the functionality of submission, execution and wait procedures
is transparently split up instead of having a preparation, intermixed
submission/execution and wait procedures.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
 drivers/spi/spi-dw-dma.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c
index d2a67dee1a66..769d10ca74b4 100644
--- a/drivers/spi/spi-dw-dma.c
+++ b/drivers/spi/spi-dw-dma.c
@@ -272,7 +272,7 @@ static int dw_spi_dma_config_tx(struct dw_spi *dws)
 }
 
 static struct dma_async_tx_descriptor *
-dw_spi_dma_prepare_tx(struct dw_spi *dws, struct spi_transfer *xfer)
+dw_spi_dma_submit_tx(struct dw_spi *dws, struct spi_transfer *xfer)
 {
 	struct dma_async_tx_descriptor *txdesc;
 
@@ -287,6 +287,9 @@ dw_spi_dma_prepare_tx(struct dw_spi *dws, struct spi_transfer *xfer)
 	txdesc->callback = dw_spi_dma_tx_done;
 	txdesc->callback_param = dws;
 
+	dmaengine_submit(txdesc);
+	set_bit(TX_BUSY, &dws->dma_chan_busy);
+
 	return txdesc;
 }
 
@@ -364,7 +367,7 @@ static int dw_spi_dma_config_rx(struct dw_spi *dws)
 	return dmaengine_slave_config(dws->rxchan, &rxconf);
 }
 
-static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
+static struct dma_async_tx_descriptor *dw_spi_dma_submit_rx(struct dw_spi *dws,
 		struct spi_transfer *xfer)
 {
 	struct dma_async_tx_descriptor *rxdesc;
@@ -380,6 +383,9 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
 	rxdesc->callback = dw_spi_dma_rx_done;
 	rxdesc->callback_param = dws;
 
+	dmaengine_submit(rxdesc);
+	set_bit(RX_BUSY, &dws->dma_chan_busy);
+
 	return rxdesc;
 }
 
@@ -426,25 +432,21 @@ static int dw_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
 	struct dma_async_tx_descriptor *txdesc, *rxdesc;
 	int ret;
 
-	/* Prepare the TX dma transfer */
-	txdesc = dw_spi_dma_prepare_tx(dws, xfer);
+	/* Submit the DMA Tx transfer */
+	txdesc = dw_spi_dma_submit_tx(dws, xfer);
 	if (!txdesc)
 		return -EINVAL;
 
-	/* Prepare the RX dma transfer */
+	/* Submit the DMA Rx transfer if required */
 	if (xfer->rx_buf) {
-		rxdesc = dw_spi_dma_prepare_rx(dws, xfer);
+		rxdesc = dw_spi_dma_submit_rx(dws, xfer);
 		if (!rxdesc)
 			return -EINVAL;
 
 		/* rx must be started before tx due to spi instinct */
-		set_bit(RX_BUSY, &dws->dma_chan_busy);
-		dmaengine_submit(rxdesc);
 		dma_async_issue_pending(dws->rxchan);
 	}
 
-	set_bit(TX_BUSY, &dws->dma_chan_busy);
-	dmaengine_submit(txdesc);
 	dma_async_issue_pending(dws->txchan);
 
 	ret = dw_spi_dma_wait(dws, xfer);
-- 
2.27.0


  parent reply	other threads:[~2020-09-20 11:24 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-20 11:23 [PATCH v2 00/11] spi: dw-dma: Add max SG entries burst capability support Serge Semin
2020-09-20 11:23 ` [PATCH v2 01/11] spi: dw-dma: Set DMA Level registers on init Serge Semin
2020-09-20 11:23 ` [PATCH v2 02/11] spi: dw-dma: Fail DMA-based transfer if no Tx-buffer specified Serge Semin
2020-09-20 11:23 ` [PATCH v2 03/11] spi: dw-dma: Configure the DMA channels in dma_setup Serge Semin
2020-09-20 11:23 ` [PATCH v2 04/11] spi: dw-dma: Check rx_buf availability in the xfer method Serge Semin
2020-09-20 11:23 ` Serge Semin [this message]
2020-09-20 11:23 ` [PATCH v2 06/11] spi: dw-dma: Check DMA Tx-desc submission status Serge Semin
2020-09-20 11:23 ` [PATCH v2 07/11] spi: dw-dma: Remove DMA Tx-desc passing around Serge Semin
2020-09-20 11:23 ` [PATCH v2 08/11] spi: dw-dma: Detach DMA transfer into a dedicated method Serge Semin
2020-09-20 11:23 ` [PATCH v2 09/11] spi: dw-dma: Move DMAC register cleanup to DMA transfer method Serge Semin
2020-09-20 11:23 ` [PATCH v2 10/11] spi: dw-dma: Pass exact data to the DMA submit and wait methods Serge Semin
2020-09-20 11:23 ` [PATCH v2 11/11] spi: dw-dma: Add one-by-one SG list entries transfer Serge Semin
2020-09-29 16:23 ` [PATCH v2 00/11] spi: dw-dma: Add max SG entries burst capability support Mark Brown

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