From: Andrew Jones <drjones@redhat.com>
To: Ying Fang <fangying1@huawei.com>
Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com,
qemu-devel@nongnu.org, alex.chen@huawei.com,
shannon.zhaosl@gmail.com, qemu-arm@nongnu.org,
alistair.francis@wdc.com, imammedo@redhat.com
Subject: Re: [RFC PATCH v2 05/13] hw: add compat machines for 5.3
Date: Thu, 29 Oct 2020 18:08:13 +0100 [thread overview]
Message-ID: <20201029170813.n7kst474zrh24m2t@kamzik.brq.redhat.com> (raw)
In-Reply-To: <20201020131440.1090-6-fangying1@huawei.com>
On Tue, Oct 20, 2020 at 09:14:32PM +0800, Ying Fang wrote:
> Add 5.2 machine types for arm/i440fx/q35/s390x/spapr.
^ 5.3
Thanks,
drew
>
> Signed-off-by: Ying Fang <fangying1@huawei.com>
> ---
> hw/arm/virt.c | 9 ++++++++-
> hw/core/machine.c | 3 +++
> hw/i386/pc.c | 3 +++
> hw/i386/pc_piix.c | 15 ++++++++++++++-
> hw/i386/pc_q35.c | 14 +++++++++++++-
> hw/ppc/spapr.c | 15 +++++++++++++--
> hw/s390x/s390-virtio-ccw.c | 14 +++++++++++++-
> include/hw/boards.h | 3 +++
> include/hw/i386/pc.h | 3 +++
> 9 files changed, 73 insertions(+), 6 deletions(-)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index ba902b53ba..ff8a14439e 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -2665,10 +2665,17 @@ static void machvirt_machine_init(void)
> }
> type_init(machvirt_machine_init);
>
> +static void virt_machine_5_3_options(MachineClass *mc)
> +{
> +}
> +DEFINE_VIRT_MACHINE_AS_LATEST(5, 3)
> +
> static void virt_machine_5_2_options(MachineClass *mc)
> {
> + virt_machine_5_3_options(mc);
> + compat_props_add(mc->compat_props, hw_compat_5_2, hw_compat_5_2_len);
> }
> -DEFINE_VIRT_MACHINE_AS_LATEST(5, 2)
> +DEFINE_VIRT_MACHINE(5, 2)
>
> static void virt_machine_5_1_options(MachineClass *mc)
> {
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index 7e2f4ec08e..6dc77699a9 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -28,6 +28,9 @@
> #include "hw/mem/nvdimm.h"
> #include "migration/vmstate.h"
>
> +GlobalProperty hw_compat_5_2[] = { };
> +const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
> +
> GlobalProperty hw_compat_5_1[] = {
> { "vhost-scsi", "num_queues", "1"},
> { "vhost-user-blk", "num-queues", "1"},
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index e87be5d29a..eaa046ff5d 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -97,6 +97,9 @@
> #include "trace.h"
> #include CONFIG_DEVICES
>
> +GlobalProperty pc_compat_5_2[] = { };
> +const size_t pc_compat_5_2_len = G_N_ELEMENTS(pc_compat_5_2);
> +
> GlobalProperty pc_compat_5_1[] = {
> { "ICH9-LPC", "x-smi-cpu-hotplug", "off" },
> };
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 3c2ae0612b..01254090ce 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -426,7 +426,7 @@ static void pc_i440fx_machine_options(MachineClass *m)
> machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
> }
>
> -static void pc_i440fx_5_2_machine_options(MachineClass *m)
> +static void pc_i440fx_5_3_machine_options(MachineClass *m)
> {
> PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
> pc_i440fx_machine_options(m);
> @@ -435,6 +435,19 @@ static void pc_i440fx_5_2_machine_options(MachineClass *m)
> pcmc->default_cpu_version = 1;
> }
>
> +DEFINE_I440FX_MACHINE(v5_3, "pc-i440fx-5.3", NULL,
> + pc_i440fx_5_3_machine_options);
> +
> +static void pc_i440fx_5_2_machine_options(MachineClass *m)
> +{
> + PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
> + pc_i440fx_machine_options(m);
> + m->alias = NULL;
> + m->is_default = false;
> + compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
> + compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
> +}
> +
> DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
> pc_i440fx_5_2_machine_options);
>
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index a3f4959c43..dd14803edb 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -344,7 +344,7 @@ static void pc_q35_machine_options(MachineClass *m)
> m->max_cpus = 288;
> }
>
> -static void pc_q35_5_2_machine_options(MachineClass *m)
> +static void pc_q35_5_3_machine_options(MachineClass *m)
> {
> PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
> pc_q35_machine_options(m);
> @@ -352,6 +352,18 @@ static void pc_q35_5_2_machine_options(MachineClass *m)
> pcmc->default_cpu_version = 1;
> }
>
> +DEFINE_Q35_MACHINE(v5_3, "pc-q35-5.3", NULL,
> + pc_q35_5_3_machine_options);
> +
> +static void pc_q35_5_2_machine_options(MachineClass *m)
> +{
> + PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
> + pc_q35_machine_options(m);
> + m->alias = NULL;
> + compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
> + compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
> +}
> +
> DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
> pc_q35_5_2_machine_options);
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 2db810f73a..c292a3edd9 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -4511,15 +4511,26 @@ static void spapr_machine_latest_class_options(MachineClass *mc)
> } \
> type_init(spapr_machine_register_##suffix)
>
> +/*
> + * pseries-5.3
> + */
> +static void spapr_machine_5_3_class_options(MachineClass *mc)
> +{
> + /* Defaults for the latest behaviour inherited from the base class */
> +}
> +
> +DEFINE_SPAPR_MACHINE(5_3, "5.3", true);
> +
> /*
> * pseries-5.2
> */
> static void spapr_machine_5_2_class_options(MachineClass *mc)
> {
> - /* Defaults for the latest behaviour inherited from the base class */
> + spapr_machine_5_3_class_options(mc);
> + compat_props_add(mc->compat_props, hw_compat_5_2, hw_compat_5_2_len);
> }
>
> -DEFINE_SPAPR_MACHINE(5_2, "5.2", true);
> +DEFINE_SPAPR_MACHINE(5_2, "5.2", false);
>
> /*
> * pseries-5.1
> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> index 28266a3a35..bde084e13d 100644
> --- a/hw/s390x/s390-virtio-ccw.c
> +++ b/hw/s390x/s390-virtio-ccw.c
> @@ -789,14 +789,26 @@ bool css_migration_enabled(void)
> } \
> type_init(ccw_machine_register_##suffix)
>
> +static void ccw_machine_5_3_instance_options(MachineState *machine)
> +{
> +}
> +
> +static void ccw_machine_5_3_class_options(MachineClass *mc)
> +{
> +}
> +DEFINE_CCW_MACHINE(5_3, "5.3", true);
> +
> static void ccw_machine_5_2_instance_options(MachineState *machine)
> {
> + ccw_machine_5_3_instance_options(machine);
> }
>
> static void ccw_machine_5_2_class_options(MachineClass *mc)
> {
> + ccw_machine_5_3_class_options(mc);
> + compat_props_add(mc->compat_props, hw_compat_5_2, hw_compat_5_2_len);
> }
> -DEFINE_CCW_MACHINE(5_2, "5.2", true);
> +DEFINE_CCW_MACHINE(5_2, "5.2", false);
>
> static void ccw_machine_5_1_instance_options(MachineState *machine)
> {
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index bf53e8a16e..f631c1799d 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -311,6 +311,9 @@ struct MachineState {
> } \
> type_init(machine_initfn##_register_types)
>
> +extern GlobalProperty hw_compat_5_2[];
> +extern const size_t hw_compat_5_2_len;
> +
> extern GlobalProperty hw_compat_5_1[];
> extern const size_t hw_compat_5_1_len;
>
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 84639d0ebc..6f1531ed14 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -190,6 +190,9 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
> void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
> const CPUArchIdList *apic_ids, GArray *entry);
>
> +extern GlobalProperty pc_compat_5_2[];
> +extern const size_t pc_compat_5_2_len;
> +
> extern GlobalProperty pc_compat_5_1[];
> extern const size_t pc_compat_5_1_len;
>
> --
> 2.23.0
>
>
next prev parent reply other threads:[~2020-10-29 17:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-20 13:14 [RFC PATCH v2 00/13] hw/arm/virt: Introduce cpu and cache topology support Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 01/13] hw/arm/virt: Spell out smp.cpus and smp.max_cpus Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 02/13] hw/arm/virt: Remove unused variable Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 03/13] hw/arm/virt: Replace smp_parse with one that prefers cores Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 04/13] device_tree: Add qemu_fdt_add_path Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 05/13] hw: add compat machines for 5.3 Ying Fang
2020-10-29 17:08 ` Andrew Jones [this message]
2020-11-03 1:47 ` Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 06/13] hw/arm/virt: DT: add cpu-map Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 07/13] hw/arm/virt-acpi-build: distinguish possible and present cpus Message Ying Fang
2020-10-29 17:20 ` Andrew Jones
2020-11-02 3:13 ` Ying Fang
2020-11-03 2:46 ` Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 08/13] hw/acpi/aml-build: add processor hierarchy node structure Ying Fang
2020-10-29 16:52 ` Andrew Jones
2020-10-29 17:24 ` Andrew Jones
2020-11-03 2:16 ` Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 09/13] hw/arm/virt-acpi-build: add PPTT table Ying Fang
2020-10-29 16:56 ` Andrew Jones
2020-11-03 2:34 ` Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 10/13] target/arm/cpu: Add CPU cache description for arm Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 11/13] hw/arm/virt: add fdt cache information Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 12/13] hw/acpi/aml-build: build ACPI CPU cache hierarchy information Ying Fang
2020-10-20 13:14 ` [RFC PATCH v2 13/13] hw/arm/virt-acpi-build: Enable CPU cache topology Ying Fang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201029170813.n7kst474zrh24m2t@kamzik.brq.redhat.com \
--to=drjones@redhat.com \
--cc=alex.chen@huawei.com \
--cc=alistair.francis@wdc.com \
--cc=fangying1@huawei.com \
--cc=imammedo@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=shannon.zhaosl@gmail.com \
--cc=zhang.zhanghailiang@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.