All of lore.kernel.org
 help / color / mirror / Atom feed
From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [v11 03/13] drm/i915/display: Attach HDR property for capable Gen9 devices
Date: Thu, 26 Nov 2020 13:44:35 +0530	[thread overview]
Message-ID: <20201126081445.29759-4-uma.shankar@intel.com> (raw)
In-Reply-To: <20201126081445.29759-1-uma.shankar@intel.com>

Attach HDR property for Gen9 devices with MCA LSPCON
chips.

v2: Cleaned HDR property attachment logic based on capability
as per Jani Nikula's suggestion.

v3: Fixed the HDR property attachment logic as per the new changes
by Kai-Feng to align with lspcon detection failure on some devices.

v4: Add HDR proprty in late_register to handle lspcon detection,
as suggested by Ville.

v5: Init Lspcon only if advertized from BIOS.

v6: Added a Todo to plan a cleanup later, added Ville's RB.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 18 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.c |  2 +-
 drivers/gpu/drm/i915/display/intel_lspcon.h |  1 +
 3 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3896d08c4177..5aaa06d73609 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6774,6 +6774,8 @@ intel_dp_connector_register(struct drm_connector *connector)
 {
 	struct drm_i915_private *i915 = to_i915(connector->dev);
 	struct intel_dp *intel_dp = intel_attached_dp(to_intel_connector(connector));
+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+	struct intel_lspcon *lspcon = &dig_port->lspcon;
 	int ret;
 
 	ret = intel_connector_register(connector);
@@ -6787,6 +6789,22 @@ intel_dp_connector_register(struct drm_connector *connector)
 	ret = drm_dp_aux_register(&intel_dp->aux);
 	if (!ret)
 		drm_dp_cec_register_connector(&intel_dp->aux, connector);
+
+	if (!intel_bios_is_lspcon_present(i915, dig_port->base.port))
+		return ret;
+
+	/*
+	 * ToDo: Clean this up to handle lspcon init and resume more
+	 * efficiently and streamlined.
+	 */
+	if (lspcon_init(dig_port)) {
+		lspcon_detect_hdr_capability(lspcon);
+		if (lspcon->hdr_supported)
+			drm_object_attach_property(&connector->base,
+						   connector->dev->mode_config.hdr_output_metadata_property,
+						   0);
+	}
+
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 641025f00286..f98891f058da 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -552,7 +552,7 @@ void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
 	lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
 }
 
-static bool lspcon_init(struct intel_digital_port *dig_port)
+bool lspcon_init(struct intel_digital_port *dig_port)
 {
 	struct intel_dp *dp = &dig_port->dp;
 	struct intel_lspcon *lspcon = &dig_port->lspcon;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 98043ba50dd4..42ccb21c908f 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -15,6 +15,7 @@ struct intel_digital_port;
 struct intel_encoder;
 struct intel_lspcon;
 
+bool lspcon_init(struct intel_digital_port *dig_port);
 void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon);
 void lspcon_resume(struct intel_digital_port *dig_port);
 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon);
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-11-26  7:41 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26  8:14 [Intel-gfx] [v11 00/13] Enable HDR on MCA LSPCON based Gen9 devices Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 01/13] drm/i915/display: Add HDR Capability detection for LSPCON Uma Shankar
2020-11-26 16:26   ` Ville Syrjälä
2020-11-26 20:10     ` Shankar, Uma
2020-11-26  8:14 ` [Intel-gfx] [v11 02/13] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon Uma Shankar
2020-11-26  8:14 ` Uma Shankar [this message]
2020-11-26  8:14 ` [Intel-gfx] [v11 04/13] drm/i915/display: Enable quantization range for HDR on LSPCON devices Uma Shankar
2020-11-26 16:27   ` Ville Syrjälä
2020-11-26  8:14 ` [Intel-gfx] [v11 05/13] drm/i915/display: Add a WARN for invalid output range and format Uma Shankar
2020-11-26 16:27   ` Ville Syrjälä
2020-11-26  8:14 ` [Intel-gfx] [v11 06/13] drm/i915/display: Attach content type property for LSPCON Uma Shankar
2020-11-26 16:28   ` Ville Syrjälä
2020-11-26  8:14 ` [Intel-gfx] [v11 07/13] i915/display: Enable BT2020 for HDR on LSPCON devices Uma Shankar
2020-11-26 17:13   ` Ville Syrjälä
2020-11-26 20:23     ` Shankar, Uma
2020-11-26  8:14 ` [Intel-gfx] [v11 08/13] drm/i915/display: Enable HDR for Parade based lspcon Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 09/13] drm/i915/display: Implement infoframes readback for LSPCON Uma Shankar
2020-11-26 16:32   ` Ville Syrjälä
2020-11-26 17:44     ` Ville Syrjälä
2020-11-26 20:11       ` Shankar, Uma
2020-11-26  8:14 ` [Intel-gfx] [v11 10/13] drm/i915/display: Implement DRM infoframe read " Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 11/13] drm/i915/lspcon: Create separate infoframe_enabled helper Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 12/13] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks Uma Shankar
2020-11-26  8:14 ` [Intel-gfx] [v11 13/13] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON Uma Shankar
2020-11-26  9:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev11) Patchwork
2020-11-26  9:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-26 10:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-26 12:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201126081445.29759-4-uma.shankar@intel.com \
    --to=uma.shankar@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.