From: Douglas Anderson <dianders@chromium.org>
To: Marc Zyngier <maz@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Linus Walleij <linus.walleij@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
Maulik Shah <mkshah@codeaurora.org>,
Stephen Boyd <swboyd@chromium.org>,
linux-arm-msm@vger.kernel.org,
Srinivas Ramana <sramana@codeaurora.org>,
Neeraj Upadhyay <neeraju@codeaurora.org>,
linux-gpio@vger.kernel.org,
Douglas Anderson <dianders@chromium.org>,
Andy Gross <agross@kernel.org>,
linux-kernel@vger.kernel.org
Subject: [PATCH v4 2/4] pinctrl: qcom: Allow SoCs to specify a GPIO function that's not 0
Date: Fri, 11 Dec 2020 14:15:36 -0800 [thread overview]
Message-ID: <20201211141514.v4.2.I3ad184e3423d8e479bc3e86f5b393abb1704a1d1@changeid> (raw)
In-Reply-To: <20201211141514.v4.1.I2702919afc253e2a451bebc3b701b462b2d22344@changeid>
There's currently a comment in the code saying function 0 is GPIO.
Instead of hardcoding it, let's add a member where an SoC can specify
it. No known SoCs use a number other than 0, but this just makes the
code clearer. NOTE: no SoC code needs to be updated since we can rely
on zero-initialization.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
(no changes since v1)
drivers/pinctrl/qcom/pinctrl-msm.c | 4 ++--
drivers/pinctrl/qcom/pinctrl-msm.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 77a25bdf0da7..588df91274e2 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -210,8 +210,8 @@ static int msm_pinmux_request_gpio(struct pinctrl_dev *pctldev,
if (!g->nfuncs)
return 0;
- /* For now assume function 0 is GPIO because it always is */
- return msm_pinmux_set_mux(pctldev, g->funcs[0], offset);
+ return msm_pinmux_set_mux(pctldev,
+ g->funcs[pctrl->soc->gpio_func], offset);
}
static const struct pinmux_ops msm_pinmux_ops = {
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h
index 333f99243c43..e31a5167c91e 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.h
+++ b/drivers/pinctrl/qcom/pinctrl-msm.h
@@ -118,6 +118,7 @@ struct msm_gpio_wakeirq_map {
* @wakeirq_dual_edge_errata: If true then GPIOs using the wakeirq_map need
* to be aware that their parent can't handle dual
* edge interrupts.
+ * @gpio_func: Which function number is GPIO (usually 0).
*/
struct msm_pinctrl_soc_data {
const struct pinctrl_pin_desc *pins;
@@ -134,6 +135,7 @@ struct msm_pinctrl_soc_data {
const struct msm_gpio_wakeirq_map *wakeirq_map;
unsigned int nwakeirq_map;
bool wakeirq_dual_edge_errata;
+ unsigned int gpio_func;
};
extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops;
--
2.29.2.576.ga3fc446d84-goog
next prev parent reply other threads:[~2020-12-11 23:10 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-11 22:15 [PATCH v4 1/4] irqchip: qcom-pdc: Fix phantom irq when changing between rising/falling Douglas Anderson
2020-12-11 22:15 ` Douglas Anderson [this message]
2020-12-11 22:15 ` [PATCH v4 3/4] pinctrl: qcom: Don't clear pending interrupts when enabling Douglas Anderson
2020-12-17 4:54 ` Stephen Boyd
2020-12-18 5:35 ` Rajendra Nayak
2020-12-21 16:00 ` Maulik Shah
2021-01-08 17:37 ` Doug Anderson
2020-12-11 22:15 ` [PATCH v4 4/4] pinctrl: qcom: Clear possible pending parent irq when remuxing GPIOs Douglas Anderson
2020-12-12 10:48 ` (subset) [PATCH v4 1/4] irqchip: qcom-pdc: Fix phantom irq when changing between rising/falling Marc Zyngier
2020-12-12 10:52 ` [irqchip: irq/irqchip-next] irqchip/qcom-pdc: " irqchip-bot for Douglas Anderson
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