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From: Claudio Fontana <cfontana@suse.de>
To: "Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>
Cc: Laurent Vivier <lvivier@redhat.com>,
	Thomas Huth <thuth@redhat.com>,
	qemu-devel@nongnu.org, Roman Bolshakov <r.bolshakov@yadro.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Claudio Fontana <cfontana@suse.de>
Subject: [PATCH v16 23/23] accel-cpu: make cpu_realizefn return a bool
Date: Thu,  4 Feb 2021 17:39:31 +0100	[thread overview]
Message-ID: <20210204163931.7358-24-cfontana@suse.de> (raw)
In-Reply-To: <20210204163931.7358-1-cfontana@suse.de>

overall, all devices' realize functions take an Error **errp, but return void.

hw/core/qdev.c code, which realizes devices, therefore does:

local_err = NULL;
dc->realize(dev, &local_err);
if (local_err != NULL) {
    goto fail;
}

However, we can improve at least accel_cpu to return a meaningful bool value.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
 include/hw/core/accel-cpu.h | 2 +-
 include/qemu/accel.h        | 2 +-
 target/i386/host-cpu.h      | 2 +-
 accel/accel-common.c        | 6 +++---
 cpu.c                       | 5 +++--
 target/i386/host-cpu.c      | 5 +++--
 target/i386/kvm/kvm-cpu.c   | 4 ++--
 target/i386/tcg/tcg-cpu.c   | 6 ++++--
 8 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/include/hw/core/accel-cpu.h b/include/hw/core/accel-cpu.h
index 24a6697412..5dbfd79955 100644
--- a/include/hw/core/accel-cpu.h
+++ b/include/hw/core/accel-cpu.h
@@ -32,7 +32,7 @@ typedef struct AccelCPUClass {
 
     void (*cpu_class_init)(CPUClass *cc);
     void (*cpu_instance_init)(CPUState *cpu);
-    void (*cpu_realizefn)(CPUState *cpu, Error **errp);
+    bool (*cpu_realizefn)(CPUState *cpu, Error **errp);
 } AccelCPUClass;
 
 #endif /* ACCEL_CPU_H */
diff --git a/include/qemu/accel.h b/include/qemu/accel.h
index da0c8ab523..4f4c283f6f 100644
--- a/include/qemu/accel.h
+++ b/include/qemu/accel.h
@@ -89,6 +89,6 @@ void accel_cpu_instance_init(CPUState *cpu);
  * @cpu: The CPU that needs to call accel-specific cpu realization.
  * @errp: currently unused.
  */
-void accel_cpu_realizefn(CPUState *cpu, Error **errp);
+bool accel_cpu_realizefn(CPUState *cpu, Error **errp);
 
 #endif /* QEMU_ACCEL_H */
diff --git a/target/i386/host-cpu.h b/target/i386/host-cpu.h
index b47bc0943f..6a9bc918ba 100644
--- a/target/i386/host-cpu.h
+++ b/target/i386/host-cpu.h
@@ -12,7 +12,7 @@
 
 void host_cpu_instance_init(X86CPU *cpu);
 void host_cpu_max_instance_init(X86CPU *cpu);
-void host_cpu_realizefn(CPUState *cs, Error **errp);
+bool host_cpu_realizefn(CPUState *cs, Error **errp);
 
 void host_cpu_vendor_fms(char *vendor, int *family, int *model, int *stepping);
 
diff --git a/accel/accel-common.c b/accel/accel-common.c
index 0f6fb4fb66..d77c09d7b5 100644
--- a/accel/accel-common.c
+++ b/accel/accel-common.c
@@ -98,14 +98,14 @@ void accel_cpu_instance_init(CPUState *cpu)
     }
 }
 
-void accel_cpu_realizefn(CPUState *cpu, Error **errp)
+bool accel_cpu_realizefn(CPUState *cpu, Error **errp)
 {
     CPUClass *cc = CPU_GET_CLASS(cpu);
 
     if (cc->accel_cpu && cc->accel_cpu->cpu_realizefn) {
-        /* NB: errp parameter is unused currently */
-        cc->accel_cpu->cpu_realizefn(cpu, errp);
+        return cc->accel_cpu->cpu_realizefn(cpu, errp);
     }
+    return true;
 }
 
 static const TypeInfo accel_cpu_type = {
diff --git a/cpu.c b/cpu.c
index 25e6fbfa2c..34a0484bf4 100644
--- a/cpu.c
+++ b/cpu.c
@@ -130,8 +130,9 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
     CPUClass *cc = CPU_GET_CLASS(cpu);
 
     cpu_list_add(cpu);
-    accel_cpu_realizefn(cpu, errp);
-
+    if (!accel_cpu_realizefn(cpu, errp)) {
+        return;
+    }
 #ifdef CONFIG_TCG
     /* NB: errp parameter is unused currently */
     if (tcg_enabled()) {
diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c
index d07d41c34c..4ea9e354ea 100644
--- a/target/i386/host-cpu.c
+++ b/target/i386/host-cpu.c
@@ -80,7 +80,7 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu)
     return phys_bits;
 }
 
-void host_cpu_realizefn(CPUState *cs, Error **errp)
+bool host_cpu_realizefn(CPUState *cs, Error **errp)
 {
     X86CPU *cpu = X86_CPU(cs);
     CPUX86State *env = &cpu->env;
@@ -97,10 +97,11 @@ void host_cpu_realizefn(CPUState *cs, Error **errp)
             error_setg(errp, "phys-bits should be between 32 and %u "
                        " (but is %u)",
                        TARGET_PHYS_ADDR_SPACE_BITS, phys_bits);
-            return;
+            return false;
         }
         cpu->phys_bits = phys_bits;
     }
+    return true;
 }
 
 #define CPUID_MODEL_ID_SZ 48
diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
index c23bbe6c50..c660ad4293 100644
--- a/target/i386/kvm/kvm-cpu.c
+++ b/target/i386/kvm/kvm-cpu.c
@@ -18,7 +18,7 @@
 #include "kvm_i386.h"
 #include "hw/core/accel-cpu.h"
 
-static void kvm_cpu_realizefn(CPUState *cs, Error **errp)
+static bool kvm_cpu_realizefn(CPUState *cs, Error **errp)
 {
     X86CPU *cpu = X86_CPU(cs);
     CPUX86State *env = &cpu->env;
@@ -41,7 +41,7 @@ static void kvm_cpu_realizefn(CPUState *cs, Error **errp)
                                                    MSR_IA32_UCODE_REV);
         }
     }
-    host_cpu_realizefn(cs, errp);
+    return host_cpu_realizefn(cs, errp);
 }
 
 /*
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index 1d3d6d1c6a..23e1f5f0c3 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -96,7 +96,7 @@ static void x86_cpu_machine_done(Notifier *n, void *unused)
     }
 }
 
-static void tcg_cpu_realizefn(CPUState *cs, Error **errp)
+static bool tcg_cpu_realizefn(CPUState *cs, Error **errp)
 {
     X86CPU *cpu = X86_CPU(cs);
 
@@ -132,12 +132,14 @@ static void tcg_cpu_realizefn(CPUState *cs, Error **errp)
     /* ... SMRAM with higher priority, linked from /machine/smram.  */
     cpu->machine_done.notify = x86_cpu_machine_done;
     qemu_add_machine_init_done_notifier(&cpu->machine_done);
+    return true;
 }
 
 #else /* CONFIG_USER_ONLY */
 
-static void tcg_cpu_realizefn(CPUState *cs, Error **errp)
+static bool tcg_cpu_realizefn(CPUState *cs, Error **errp)
 {
+    return true;
 }
 
 #endif /* !CONFIG_USER_ONLY */
-- 
2.26.2



  parent reply	other threads:[~2021-02-04 17:17 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-04 16:39 [PATCH v16 00/23] i386 cleanup PART 2 Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 01/23] cpu: Introduce TCGCpuOperations struct Claudio Fontana
2021-02-10 12:21   ` Roman Bolshakov
2021-02-10 12:29     ` Claudio Fontana
2021-02-10 12:32     ` Eduardo Habkost
2021-02-10 13:58       ` Roman Bolshakov
2021-02-04 16:39 ` [PATCH v16 02/23] target/riscv: remove CONFIG_TCG, as it is always TCG Claudio Fontana
2021-02-10 12:22   ` Roman Bolshakov
2021-02-10 12:37     ` Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 03/23] accel/tcg: split TCG-only code from cpu_exec_realizefn Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 04/23] cpu: Move synchronize_from_tb() to tcg_ops Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 05/23] cpu: Move cpu_exec_* " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 06/23] cpu: Move tlb_fill " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 07/23] cpu: Move debug_excp_handler " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 08/23] target/arm: do not use cc->do_interrupt for KVM directly Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 09/23] cpu: move cc->do_interrupt to tcg_ops Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 10/23] cpu: move cc->transaction_failed " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 11/23] cpu: move do_unaligned_access " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 12/23] physmem: make watchpoint checking code TCG-only Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 13/23] cpu: move adjust_watchpoint_address to tcg_ops Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 14/23] cpu: move debug_check_watchpoint " Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 15/23] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 16/23] accel: extend AccelState and AccelClass to user-mode Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 17/23] accel: replace struct CpusAccel with AccelOpsClass Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 18/23] accel: introduce AccelCPUClass extending CPUClass Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 19/23] i386: split cpu accelerators from cpu.c, using AccelCPUClass Claudio Fontana
2021-02-05 20:04   ` Richard Henderson
2021-02-10 11:30     ` Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 20/23] cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 21/23] accel: introduce new accessor functions Claudio Fontana
2021-02-05 20:14   ` Richard Henderson
2021-02-08 12:50     ` Claudio Fontana
2021-02-08 12:54       ` Philippe Mathieu-Daudé
2021-02-10 13:49         ` Claudio Fontana
2021-02-14 19:01         ` Claudio Fontana
2021-02-04 16:39 ` [PATCH v16 22/23] target/i386: fix host_cpu_adjust_phys_bits error handling Claudio Fontana
2021-02-05 20:15   ` Richard Henderson
2021-02-04 16:39 ` Claudio Fontana [this message]
2021-02-05 20:17   ` [PATCH v16 23/23] accel-cpu: make cpu_realizefn return a bool Richard Henderson
2021-02-05 20:18 ` [PATCH v16 00/23] i386 cleanup PART 2 Richard Henderson
2021-03-14  0:00 ` Philippe Mathieu-Daudé
2021-03-15  9:44   ` Claudio Fontana
2021-03-15  9:57     ` Philippe Mathieu-Daudé

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