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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: "Daniel Henrique Barboza" <danielhb413@gmail.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"David Gibson" <david@gibson.dropbear.id.au>,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 13/19] spapr_numa.c: create spapr_numa_initial_nvgpu_numa_id() helper
Date: Wed, 10 Feb 2021 17:17:29 +1100	[thread overview]
Message-ID: <20210210061735.304384-14-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20210210061735.304384-1-david@gibson.dropbear.id.au>

From: Daniel Henrique Barboza <danielhb413@gmail.com>

We'll need to check the initial value given to spapr->gpu_numa_id when
building the rtas DT, so put it in a helper for easier access and to
avoid repetition.

Tested-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20210128174213.1349181-3-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/ppc/spapr.c              | 11 +----------
 hw/ppc/spapr_numa.c         | 14 ++++++++++++++
 include/hw/ppc/spapr_numa.h |  1 +
 3 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8a1a979257..85fe65f894 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2770,16 +2770,7 @@ static void spapr_machine_init(MachineState *machine)
 
     }
 
-    /*
-     * NVLink2-connected GPU RAM needs to be placed on a separate NUMA node.
-     * We assign a new numa ID per GPU in spapr_pci_collect_nvgpu() which is
-     * called from vPHB reset handler so we initialize the counter here.
-     * If no NUMA is configured from the QEMU side, we start from 1 as GPU RAM
-     * must be equally distant from any other node.
-     * The final value of spapr->gpu_numa_id is going to be written to
-     * max-associativity-domains in spapr_build_fdt().
-     */
-    spapr->gpu_numa_id = MAX(1, machine->numa_state->num_nodes);
+    spapr->gpu_numa_id = spapr_numa_initial_nvgpu_numa_id(machine);
 
     /* Init numa_assoc_array */
     spapr_numa_associativity_init(spapr, machine);
diff --git a/hw/ppc/spapr_numa.c b/hw/ppc/spapr_numa.c
index 261810525b..a757dd88b8 100644
--- a/hw/ppc/spapr_numa.c
+++ b/hw/ppc/spapr_numa.c
@@ -46,6 +46,20 @@ static bool spapr_numa_is_symmetrical(MachineState *ms)
     return true;
 }
 
+/*
+ * NVLink2-connected GPU RAM needs to be placed on a separate NUMA node.
+ * We assign a new numa ID per GPU in spapr_pci_collect_nvgpu() which is
+ * called from vPHB reset handler so we initialize the counter here.
+ * If no NUMA is configured from the QEMU side, we start from 1 as GPU RAM
+ * must be equally distant from any other node.
+ * The final value of spapr->gpu_numa_id is going to be written to
+ * max-associativity-domains in spapr_build_fdt().
+ */
+unsigned int spapr_numa_initial_nvgpu_numa_id(MachineState *machine)
+{
+    return MAX(1, machine->numa_state->num_nodes);
+}
+
 /*
  * This function will translate the user distances into
  * what the kernel understand as possible values: 10
diff --git a/include/hw/ppc/spapr_numa.h b/include/hw/ppc/spapr_numa.h
index b3fd950634..6f9f02d3de 100644
--- a/include/hw/ppc/spapr_numa.h
+++ b/include/hw/ppc/spapr_numa.h
@@ -31,5 +31,6 @@ int spapr_numa_fixup_cpu_dt(SpaprMachineState *spapr, void *fdt,
                             int offset, PowerPCCPU *cpu);
 int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt,
                                          int offset);
+unsigned int spapr_numa_initial_nvgpu_numa_id(MachineState *machine);
 
 #endif /* HW_SPAPR_NUMA_H */
-- 
2.29.2



  parent reply	other threads:[~2021-02-10  6:30 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-10  6:17 [PULL 00/19] ppc-for-6.0 queue 20210210 David Gibson
2021-02-10  6:17 ` [PULL 01/19] spapr.c: use g_auto* with 'nodename' in CPU DT functions David Gibson
2021-02-10  6:17 ` [PULL 02/19] spapr.c: add 'name' property for hotplugged CPUs nodes David Gibson
2021-02-10  6:17 ` [PULL 03/19] spapr: Adjust firmware path of PCI devices David Gibson
2021-02-10  6:17 ` [PULL 04/19] target/ppc: Remove unused MMU definitions David Gibson
2021-02-10  6:17 ` [PULL 05/19] ppc/pnv: Add trace events for PCI event notification David Gibson
2021-02-10  6:17 ` [PULL 06/19] ppc/xive: Add firmware bit when dumping the ENDs David Gibson
2021-02-10  6:17 ` [PULL 07/19] ppc/pnv: Use skiboot addresses to load kernel and ramfs David Gibson
2021-02-10  6:17 ` [PULL 08/19] ppc/pnv: Simplify pnv_bmc_create() David Gibson
2021-02-10  6:17 ` [PULL 09/19] ppc/pnv: Discard internal BMC initialization when BMC is external David Gibson
2021-02-10  6:17 ` [PULL 10/19] ppc/pnv: Remove default disablement of the PNOR contents David Gibson
2021-02-10  6:17 ` [PULL 11/19] ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR David Gibson
2021-02-10  6:17 ` [PULL 12/19] spapr: move spapr_machine_using_legacy_numa() to spapr_numa.c David Gibson
2021-02-10  6:17 ` David Gibson [this message]
2021-02-10  6:17 ` [PULL 14/19] spapr_numa.c: fix ibm, max-associativity-domains calculation David Gibson
2021-02-10  6:17 ` [PULL 15/19] ppc/pnv: Set default RAM size to 1 GB David Gibson
2021-02-10  6:17 ` [PULL 16/19] hw/ppc: e500: Use a macro for the platform clock frequency David Gibson
2021-02-10  6:17 ` [PULL 17/19] hw/ppc: e500: Fill in correct <clock-frequency> for the serial nodes David Gibson
2021-02-10  6:17 ` [PULL 18/19] hw/net: fsl_etsec: Reverse the RCTRL.RSF logic David Gibson
2021-02-10  6:17 ` [PULL 19/19] target/ppc: Add E500 L2CSR0 write helper David Gibson
2021-02-10 15:42 ` [PULL 00/19] ppc-for-6.0 queue 20210210 Peter Maydell

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