[PATCH V3 1/3] can: flexcan: assert FRZ bit in flexcan_chip_freeze()

From: Joakim Zhang <qiangqing.zhang@nxp.com>
To: mkl@pengutronix.de
Cc: linux-can@vger.kernel.org, linux-imx@nxp.com
Subject: [PATCH V3 1/3] can: flexcan: assert FRZ bit in flexcan_chip_freeze()
Date: Thu, 18 Feb 2021 19:00:35 +0800	[thread overview]
Message-ID: <20210218110037.16591-2-qiangqing.zhang@nxp.com> (raw)
In-Reply-To: <20210218110037.16591-1-qiangqing.zhang@nxp.com>

Assert HALT bit to enter freeze mode, there is a premise that FRZ bit is
asserted. This patch asserts FRZ bit in flexcan_chip_freeze, although
the reset value is 1b'1. This is a prepare patch, later patch will
invoke flexcan_chip_freeze() to enter freeze mode, which polling freeze
mode acknowledge.

Fixes: b1aa1c7a2165b ("can: flexcan: fix transition from and to freeze mode in chip_{,un}freeze")
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
---
 drivers/net/can/flexcan.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 038fe1036df2..737e594cb12c 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -662,7 +662,7 @@ static int flexcan_chip_freeze(struct flexcan_priv *priv)
 	u32 reg;
 
 	reg = priv->read(&regs->mcr);
-	reg |= FLEXCAN_MCR_HALT;
+	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
 	priv->write(reg, &regs->mcr);
 
 	while (timeout-- && !(priv->read(&regs->mcr) & FLEXCAN_MCR_FRZ_ACK))
-- 
2.17.1

