From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Xuzhou Cheng <xuzhou.cheng@windriver.com>,
Bin Meng <bin.meng@windriver.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Francisco Iglesias <francisco.iglesias@xilinx.com>,
qemu-arm <qemu-arm@nongnu.org>,
Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PATCH v4 3/5] hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI
Date: Tue, 23 Feb 2021 10:23:30 +0100 [thread overview]
Message-ID: <20210223092330.GV477672@toto> (raw)
In-Reply-To: <CAEUhbmU5NXZv84ncgP15thonVQgFRfgmMZqfJQtAxjZ7fj9KcQ@mail.gmail.com>
On Tue, Feb 23, 2021 at 05:20:36PM +0800, Bin Meng wrote:
> Hi Edgar,
>
> On Tue, Feb 23, 2021 at 5:01 PM Edgar E. Iglesias
> <edgar.iglesias@gmail.com> wrote:
> >
> > On Mon, Feb 22, 2021 at 09:05:12PM +0800, Bin Meng wrote:
> > > From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> > >
> > > Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream
> > > link of GQSPI to CSU DMA.
> > >
> > > Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> > > Signed-off-by: Bin Meng <bin.meng@windriver.com>
> > >
> > > ---
> > >
> > > Changes in v4:
> > > - Rename "csu_dma" to "qspi_dma"
> > >
> > > Changes in v3:
> > > - new patch: xlnx-zynqmp: Add XLNX CSU DMA module
> > >
> > > include/hw/arm/xlnx-zynqmp.h | 2 ++
> > > hw/arm/xlnx-zynqmp.c | 14 ++++++++++++++
> > > hw/arm/Kconfig | 1 +
> > > 3 files changed, 17 insertions(+)
> > >
> > > diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> > > index be15cc8814..2edeed911c 100644
> > > --- a/include/hw/arm/xlnx-zynqmp.h
> > > +++ b/include/hw/arm/xlnx-zynqmp.h
> > > @@ -35,6 +35,7 @@
> > > #include "target/arm/cpu.h"
> > > #include "qom/object.h"
> > > #include "net/can_emu.h"
> > > +#include "hw/dma/xlnx_csu_dma.h"
> > >
> > > #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
> > > OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
> > > @@ -108,6 +109,7 @@ struct XlnxZynqMPState {
> > > XlnxZynqMPRTC rtc;
> > > XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
> > > XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
> > > + XlnxCSUDMA qspi_dma;
> > >
> > > char *boot_cpu;
> > > ARMCPU *boot_cpu_ptr;
> > > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> > > index 49465a2794..30f43dfda2 100644
> > > --- a/hw/arm/xlnx-zynqmp.c
> > > +++ b/hw/arm/xlnx-zynqmp.c
> > > @@ -50,6 +50,7 @@
> > > #define QSPI_ADDR 0xff0f0000
> > > #define LQSPI_ADDR 0xc0000000
> > > #define QSPI_IRQ 15
> > > +#define QSPI_DMA_ADDR 0xff0f0800
> > >
> > > #define DP_ADDR 0xfd4a0000
> > > #define DP_IRQ 113
> > > @@ -63,6 +64,8 @@
> > > #define RTC_ADDR 0xffa60000
> > > #define RTC_IRQ 26
> > >
> > > +
> > > +
> >
> > These blank lines look un-related, if you remove them, this looks good to me:
> >
> > Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>
> Thanks for the review.
>
> A RESEND version was already sent out to the ML before. Sorry for the
> inconvenience.
> http://patchwork.ozlabs.org/project/qemu-devel/patch/20210222131502.3098-4-bmeng.cn@gmail.com/
>
Ah I see, no worries!
Cheers,
Edgar
next prev parent reply other threads:[~2021-02-23 9:28 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-22 13:05 [PATCH v4 0/5] hw/arm: zynqmp: Implement a CSU DMA model and connect it with GQSPI Bin Meng
2021-02-22 13:05 ` [PATCH v4 1/5] hw/dma: xlnx_csu_dma: Implement a Xilinx CSU DMA model Bin Meng
2021-02-23 9:21 ` Edgar E. Iglesias
2021-02-23 9:23 ` Bin Meng
2021-02-23 9:33 ` Edgar E. Iglesias
2021-02-22 13:05 ` [PATCH v4 2/5] hw/arm: xlnx-zynqmp: Clean up coding convention issues Bin Meng
2021-02-23 8:58 ` Edgar E. Iglesias
2021-02-22 13:05 ` [PATCH v4 3/5] hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI Bin Meng
2021-02-23 9:01 ` Edgar E. Iglesias
2021-02-23 9:20 ` Bin Meng
2021-02-23 9:23 ` Edgar E. Iglesias [this message]
2021-02-22 13:05 ` [PATCH v4 4/5] hw/ssi: xilinx_spips: Clean up coding convention issues Bin Meng
2021-02-22 13:05 ` [PATCH v4 5/5] hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips Bin Meng
2021-02-23 9:02 ` Edgar E. Iglesias
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