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From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Paul Fertser" <fercerpav@gmail.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Matt Merhar" <mattmerhar@protonmail.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Nicolas Chauvet" <kwizart@gmail.com>,
	"Viresh Kumar" <vireshk@kernel.org>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Michał Mirosław" <mirq-linux@rere.qmqm.pl>,
	"Krzysztof Kozlowski" <krzk@kernel.org>
Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v4 6/6] soc/tegra: pmc: Link children power domains to the parent domain
Date: Sun, 14 Mar 2021 19:48:10 +0300	[thread overview]
Message-ID: <20210314164810.26317-7-digetx@gmail.com> (raw)
In-Reply-To: <20210314164810.26317-1-digetx@gmail.com>

The Core domain is a parent of PMC power domains, hence PMC domains
should be set up as a sub-domains of the parent (Core) domain if
"power-domains" phandle presents in a device-tree node of PMC domain.

This allows to propagate GENPD performance changes to the parent Core
domain if performance change is applied to a PMC domain.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 drivers/soc/tegra/pmc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
index 84ab27d85d92..ba8407819397 100644
--- a/drivers/soc/tegra/pmc.c
+++ b/drivers/soc/tegra/pmc.c
@@ -1283,6 +1283,7 @@ static int tegra_powergate_add(struct tegra_pmc *pmc, struct device_node *np)
 static int tegra_powergate_init(struct tegra_pmc *pmc,
 				struct device_node *parent)
 {
+	struct of_phandle_args child_args, parent_args;
 	struct device_node *np, *child;
 	int err = 0;
 
@@ -1296,6 +1297,21 @@ static int tegra_powergate_init(struct tegra_pmc *pmc,
 			of_node_put(child);
 			break;
 		}
+
+		if (of_parse_phandle_with_args(child, "power-domains",
+					       "#power-domain-cells",
+					       0, &parent_args))
+			continue;
+
+		child_args.np = child;
+		child_args.args_count = 0;
+
+		err = of_genpd_add_subdomain(&parent_args, &child_args);
+		of_node_put(parent_args.np);
+		if (err) {
+			of_node_put(child);
+			break;
+		}
 	}
 
 	of_node_put(np);
-- 
2.30.2


      parent reply	other threads:[~2021-03-14 16:49 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-14 16:48 [PATCH v4 0/6] NVIDIA Tegra core power domain driver and OPP helper Dmitry Osipenko
2021-03-14 16:48 ` [PATCH v4 1/6] soc/tegra: Add devm_tegra_core_dev_init_opp_table() Dmitry Osipenko
2021-03-18 10:27   ` Dmitry Osipenko
2021-03-18 10:32     ` Viresh Kumar
2021-03-18 10:37       ` Dmitry Osipenko
2021-03-31 15:45         ` Dmitry Osipenko
2021-03-14 16:48 ` [PATCH v4 2/6] soc/tegra: Add CONFIG_SOC_TEGRA_COMMON and select PM_OPP by default Dmitry Osipenko
2021-03-14 16:48 ` [PATCH v4 3/6] dt-bindings: power: tegra: Add binding for core power domain Dmitry Osipenko
2021-03-23 22:48   ` Rob Herring
2021-03-23 23:01     ` Dmitry Osipenko
2021-03-25 14:49       ` Thierry Reding
2021-03-25 17:38         ` Dmitry Osipenko
2021-03-14 16:48 ` [PATCH v4 4/6] soc/tegra: Introduce core power domain driver Dmitry Osipenko
2021-03-14 16:48 ` [PATCH v4 5/6] soc/tegra: regulators: Support Core domain state syncing Dmitry Osipenko
2021-03-14 16:48 ` Dmitry Osipenko [this message]

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