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From: Luis Pires <luis.pires@eldorado.org.br>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: richard.henderson@linaro.org, f4bug@amsat.org,
	lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br,
	matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au
Subject: [PATCH v2 03/15] target/ppc: Split out decode_legacy
Date: Tue, 27 Apr 2021 14:16:37 -0300	[thread overview]
Message-ID: <20210427171649.364699-4-luis.pires@eldorado.org.br> (raw)
In-Reply-To: <20210427171649.364699-1-luis.pires@eldorado.org.br>

From: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/translate.c | 115 +++++++++++++++++++++++------------------
 1 file changed, 64 insertions(+), 51 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ee25badba2..ebe5afe7ae 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7876,6 +7876,62 @@ void ppc_cpu_dump_statistics(CPUState *cs, int flags)
 #endif
 }
 
+static bool decode_legacy(PowerPCCPU *cpu, DisasContext *ctx, uint32_t insn)
+{
+    opc_handler_t **table, *handler;
+    uint32_t inval;
+
+    ctx->opcode = insn;
+
+    LOG_DISAS("translate opcode %08x (%02x %02x %02x %02x) (%s)\n",
+              insn, opc1(insn), opc2(insn), opc3(insn), opc4(insn),
+              ctx->le_mode ? "little" : "big");
+
+    table = cpu->opcodes;
+    handler = table[opc1(insn)];
+    if (is_indirect_opcode(handler)) {
+        table = ind_table(handler);
+        handler = table[opc2(insn)];
+        if (is_indirect_opcode(handler)) {
+            table = ind_table(handler);
+            handler = table[opc3(insn)];
+            if (is_indirect_opcode(handler)) {
+                table = ind_table(handler);
+                handler = table[opc4(insn)];
+            }
+        }
+    }
+
+    /* Is opcode *REALLY* valid ? */
+    if (unlikely(handler->handler == &gen_invalid)) {
+        qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: "
+                      "%02x - %02x - %02x - %02x (%08x) "
+                      TARGET_FMT_lx "\n",
+                      opc1(insn), opc2(insn), opc3(insn), opc4(insn),
+                      insn, ctx->cia);
+        return false;
+    }
+
+    if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE)
+                 && Rc(insn))) {
+        inval = handler->inval2;
+    } else {
+        inval = handler->inval1;
+    }
+
+    if (unlikely((insn & inval) != 0)) {
+        qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: "
+                      "%02x - %02x - %02x - %02x (%08x) "
+                      TARGET_FMT_lx "\n", insn & inval,
+                      opc1(insn), opc2(insn), opc3(insn), opc4(insn),
+                      insn, ctx->cia);
+        return false;
+    }
+
+    handler->handler(ctx);
+    return true;
+}
+
 static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
 {
     DisasContext *ctx = container_of(dcbase, DisasContext, base);
@@ -7997,66 +8053,23 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
     DisasContext *ctx = container_of(dcbase, DisasContext, base);
     PowerPCCPU *cpu = POWERPC_CPU(cs);
     CPUPPCState *env = cs->env_ptr;
-    opc_handler_t **table, *handler;
+    uint32_t insn;
+    bool ok;
 
     LOG_DISAS("----------------\n");
     LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n",
               ctx->base.pc_next, ctx->mem_idx, (int)msr_ir);
 
     ctx->cia = ctx->base.pc_next;
-    ctx->opcode = translator_ldl_swap(env, ctx->base.pc_next,
-                                      need_byteswap(ctx));
-
-    LOG_DISAS("translate opcode %08x (%02x %02x %02x %02x) (%s)\n",
-              ctx->opcode, opc1(ctx->opcode), opc2(ctx->opcode),
-              opc3(ctx->opcode), opc4(ctx->opcode),
-              ctx->le_mode ? "little" : "big");
+    insn = translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx));
     ctx->base.pc_next += 4;
-    table = cpu->opcodes;
-    handler = table[opc1(ctx->opcode)];
-    if (is_indirect_opcode(handler)) {
-        table = ind_table(handler);
-        handler = table[opc2(ctx->opcode)];
-        if (is_indirect_opcode(handler)) {
-            table = ind_table(handler);
-            handler = table[opc3(ctx->opcode)];
-            if (is_indirect_opcode(handler)) {
-                table = ind_table(handler);
-                handler = table[opc4(ctx->opcode)];
-            }
-        }
-    }
-    /* Is opcode *REALLY* valid ? */
-    if (unlikely(handler->handler == &gen_invalid)) {
-        qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: "
-                      "%02x - %02x - %02x - %02x (%08x) "
-                      TARGET_FMT_lx " %d\n",
-                      opc1(ctx->opcode), opc2(ctx->opcode),
-                      opc3(ctx->opcode), opc4(ctx->opcode),
-                      ctx->opcode, ctx->cia, (int)msr_ir);
-    } else {
-        uint32_t inval;
 
-        if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE)
-                     && Rc(ctx->opcode))) {
-            inval = handler->inval2;
-        } else {
-            inval = handler->inval1;
-        }
-
-        if (unlikely((ctx->opcode & inval) != 0)) {
-            qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: "
-                          "%02x - %02x - %02x - %02x (%08x) "
-                          TARGET_FMT_lx "\n", ctx->opcode & inval,
-                          opc1(ctx->opcode), opc2(ctx->opcode),
-                          opc3(ctx->opcode), opc4(ctx->opcode),
-                          ctx->opcode, ctx->cia);
-            gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);
-            ctx->base.is_jmp = DISAS_NORETURN;
-            return;
-        }
+    ok = decode_legacy(cpu, ctx, insn);
+    if (!ok) {
+        gen_invalid(ctx);
+        ctx->base.is_jmp = DISAS_NORETURN;
     }
-    (*(handler->handler))(ctx);
+
 #if defined(DO_PPC_STATISTICS)
     handler->count++;
 #endif
-- 
2.25.1



  parent reply	other threads:[~2021-04-27 17:28 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-27 17:16 [PATCH v2 00/15] Base for adding PowerPC 64-bit instructions Luis Pires
2021-04-27 17:16 ` [PATCH v2 01/15] decodetree: Add support for " Luis Pires
2021-04-27 17:16 ` [PATCH v2 02/15] target/ppc: Add cia field to DisasContext Luis Pires
2021-04-28 14:55   ` Richard Henderson
2021-04-28 14:59     ` Luis Fernando Fujita Pires
2021-04-27 17:16 ` Luis Pires [this message]
2021-04-27 17:16 ` [PATCH v2 04/15] target/ppc: Move DISAS_NORETURN setting into gen_exception* Luis Pires
2021-04-28 15:05   ` Richard Henderson
2021-04-29 17:07     ` Luis Fernando Fujita Pires
2021-04-29 17:21       ` Richard Henderson
2021-04-27 17:16 ` [PATCH v2 05/15] target/ppc: Tidy exception vs exit_tb Luis Pires
2021-04-27 17:16 ` [PATCH v2 06/15] target/ppc: Mark helper_raise_exception* as noreturn Luis Pires
2021-04-27 17:16 ` [PATCH v2 07/15] target/ppc: Use translator_loop_temp_check Luis Pires
2021-04-27 17:16 ` [PATCH v2 08/15] target/ppc: Add infrastructure for prefixed insns Luis Pires
2021-04-27 17:16 ` [PATCH v2 09/15] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI Luis Pires
2021-04-28 14:10   ` Matheus K. Ferst
2021-04-28 15:23     ` Richard Henderson
2021-04-27 17:16 ` [PATCH v2 10/15] target/ppc: Implement PNOP Luis Pires
2021-04-27 17:16 ` [PATCH v2 11/15] target/ppc: Move D/DS/X-form integer loads to decodetree Luis Pires
2021-04-28 13:31   ` Matheus K. Ferst
2021-04-28 15:34     ` Richard Henderson
2021-04-27 17:16 ` [PATCH v2 12/15] target/ppc: Implement prefixed integer load instructions Luis Pires
2021-04-27 17:16 ` [PATCH v2 13/15] target/ppc: Move D/DS/X-form integer stores to decodetree Luis Pires
2021-04-27 17:16 ` [PATCH v2 14/15] target/ppc: Implement prefixed integer store instructions Luis Pires
2021-04-27 17:16 ` [PATCH v2 15/15] target/ppc: Check cpu flags for prefixed insn support Luis Pires
2021-04-28 15:37   ` Richard Henderson

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