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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v4 09/30] target/mips: Merge do_translate_address into cpu_mips_translate_address
Date: Wed, 28 Apr 2021 19:03:49 +0200	[thread overview]
Message-ID: <20210428170410.479308-10-f4bug@amsat.org> (raw)
In-Reply-To: <20210428170410.479308-1-f4bug@amsat.org>

Currently cpu_mips_translate_address() calls raise_mmu_exception(),
and do_translate_address() calls cpu_loop_exit_restore().

This API split is dangerous, we could call cpu_mips_translate_address
without returning to the main loop.

As there is only one caller, it is trivial (and safer) to merge
do_translate_address() back to cpu_mips_translate_address().

Reported-by: Richard Henderson <richard.henderson@linaro.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/internal.h   |  2 +-
 target/mips/op_helper.c  | 20 ++------------------
 target/mips/tlb_helper.c | 11 ++++++-----
 3 files changed, 9 insertions(+), 24 deletions(-)

diff --git a/target/mips/internal.h b/target/mips/internal.h
index 04f4b3d6614..e93e057bece 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -148,7 +148,7 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
                                     int mmu_idx, MemTxAttrs attrs,
                                     MemTxResult response, uintptr_t retaddr);
 hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
-                                  MMUAccessType access_type);
+                                  MMUAccessType access_type, uintptr_t retaddr);
 #endif
 
 #define cpu_signal_handler cpu_mips_signal_handler
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 222a0d7c7b3..61e68cc8bed 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -287,23 +287,6 @@ target_ulong helper_rotx(target_ulong rs, uint32_t shift, uint32_t shiftx,
 
 #ifndef CONFIG_USER_ONLY
 
-static inline hwaddr do_translate_address(CPUMIPSState *env,
-                                          target_ulong address,
-                                          MMUAccessType access_type,
-                                          uintptr_t retaddr)
-{
-    hwaddr paddr;
-    CPUState *cs = env_cpu(env);
-
-    paddr = cpu_mips_translate_address(env, address, access_type);
-
-    if (paddr == -1LL) {
-        cpu_loop_exit_restore(cs, retaddr);
-    } else {
-        return paddr;
-    }
-}
-
 #define HELPER_LD_ATOMIC(name, insn, almask, do_cast)                         \
 target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx)  \
 {                                                                             \
@@ -313,7 +296,8 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx)  \
         }                                                                     \
         do_raise_exception(env, EXCP_AdEL, GETPC());                          \
     }                                                                         \
-    env->CP0_LLAddr = do_translate_address(env, arg, MMU_DATA_LOAD, GETPC()); \
+    env->CP0_LLAddr = cpu_mips_translate_address(env, arg, MMU_DATA_LOAD,     \
+                                                 GETPC());                    \
     env->lladdr = arg;                                                        \
     env->llval = do_cast cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC());  \
     return env->llval;                                                        \
diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index 8d3ea497803..1ffdc1f8304 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -904,21 +904,22 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 
 #ifndef CONFIG_USER_ONLY
 hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
-                                  MMUAccessType access_type)
+                                  MMUAccessType access_type, uintptr_t retaddr)
 {
     hwaddr physical;
     int prot;
     int ret = 0;
+    CPUState *cs = env_cpu(env);
 
     /* data access */
     ret = get_physical_address(env, &physical, &prot, address, access_type,
                                cpu_mmu_index(env, false));
-    if (ret != TLBRET_MATCH) {
-        raise_mmu_exception(env, address, access_type, ret);
-        return -1LL;
-    } else {
+    if (ret == TLBRET_MATCH) {
         return physical;
     }
+
+    raise_mmu_exception(env, address, access_type, ret);
+    cpu_loop_exit_restore(cs, retaddr);
 }
 
 static void set_hflags_for_handler(CPUMIPSState *env)
-- 
2.26.3



  parent reply	other threads:[~2021-04-28 17:16 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-28 17:03 [PATCH v4 00/30] target/mips: Re-org to allow KVM-only builds Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 01/30] target/mips: Simplify meson TCG rules Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 02/30] target/mips: Move IEEE rounding mode array to new source file Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 03/30] target/mips: Move msa_reset() " Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 04/30] target/mips: Make CPU/FPU regnames[] arrays global Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 05/30] target/mips: Optimize CPU/FPU regnames[] arrays Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 06/30] target/mips: Restrict mips_cpu_dump_state() to cpu.c Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 07/30] target/mips: Turn printfpr() macro into a proper function Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 08/30] target/mips: Declare mips_env_set_pc() inlined in "internal.h" Philippe Mathieu-Daudé
2021-04-28 20:13   ` Richard Henderson
2021-04-28 17:03 ` Philippe Mathieu-Daudé [this message]
2021-04-28 17:03 ` [PATCH v4 10/30] target/mips: Extract load/store helpers to ldst_helper.c Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 11/30] meson: Introduce meson_user_arch source set for arch-specific user-mode Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 12/30] target/mips: Introduce tcg-internal.h for TCG specific declarations Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 13/30] target/mips: Add simple user-mode mips_cpu_do_interrupt() Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 14/30] target/mips: Add simple user-mode mips_cpu_tlb_fill() Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 15/30] target/mips: Move cpu_signal_handler definition around Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 16/30] target/mips: Move sysemu specific files under sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 17/30] target/mips: Move physical addressing code to sysemu/physaddr.c Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 18/30] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG Philippe Mathieu-Daudé
2021-04-28 17:03 ` [PATCH v4 19/30] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 20/30] target/mips: Restrict mmu_init() to TCG Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 21/30] target/mips: Move tlb_helper.c to tcg/sysemu/ Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 22/30] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 23/30] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 24/30] target/mips: Move helper_cache() " Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 25/30] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 26/30] target/mips: Move exception management code to exception.c Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 27/30] target/mips: Move CP0 helpers to sysemu/cp0.c Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 28/30] target/mips: Move TCG source files under tcg/ sub directory Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 29/30] hw/mips: Restrict non-virtualized machines to TCG Philippe Mathieu-Daudé
2021-04-28 17:04 ` [PATCH v4 30/30] gitlab-ci: Add KVM mips64el cross-build jobs Philippe Mathieu-Daudé
2021-04-28 17:24 ` [PATCH v4 00/30] target/mips: Re-org to allow KVM-only builds no-reply
2021-04-29 21:42 ` Philippe Mathieu-Daudé

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