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From: Yang Zhong <yang.zhong@intel.com>
To: qemu-devel@nongnu.org
Cc: yang.zhong@intel.com, pbonzini@redhat.com, kai.huang@intel.com,
	seanjc@google.com
Subject: [PATCH v2 02/32] hostmem: Add hostmem-epc as a backend for SGX EPC
Date: Tue, 11 May 2021 14:20:21 +0800	[thread overview]
Message-ID: <20210511062051.41948-3-yang.zhong@intel.com> (raw)
In-Reply-To: <20210511062051.41948-1-yang.zhong@intel.com>

From: Sean Christopherson <sean.j.christopherson@intel.com>

EPC (Enclave Page Cahe) is a specialized type of memory used by Intel
SGX (Software Guard Extensions).  The SDM desribes EPC as:

    The Enclave Page Cache (EPC) is the secure storage used to store
    enclave pages when they are a part of an executing enclave. For an
    EPC page, hardware performs additional access control checks to
    restrict access to the page. After the current page access checks
    and translations are performed, the hardware checks that the EPC
    page is accessible to the program currently executing. Generally an
    EPC page is only accessed by the owner of the executing enclave or
    an instruction which is setting up an EPC page.

Because of its unique requirements, Linux manages EPC separately from
normal memory.  Similar to memfd, the device /dev/sgx_vepc can be
opened to obtain a file descriptor which can in turn be used to mmap()
EPC memory.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>

v1-->v2:
   - Unified the "share" and "protected" arguments with ram_flags in the
     memory_region_init_ram_from_fd()(Paolo).
---
 backends/hostmem-epc.c | 92 ++++++++++++++++++++++++++++++++++++++++++
 backends/meson.build   |  1 +
 2 files changed, 93 insertions(+)
 create mode 100644 backends/hostmem-epc.c

diff --git a/backends/hostmem-epc.c b/backends/hostmem-epc.c
new file mode 100644
index 0000000000..b512a68cb0
--- /dev/null
+++ b/backends/hostmem-epc.c
@@ -0,0 +1,92 @@
+/*
+ * QEMU host SGX EPC memory backend
+ *
+ * Copyright (C) 2019 Intel Corporation
+ *
+ * Authors:
+ *   Sean Christopherson <sean.j.christopherson@intel.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#include <sys/ioctl.h>
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "qom/object_interfaces.h"
+#include "qapi/error.h"
+#include "sysemu/hostmem.h"
+
+#define TYPE_MEMORY_BACKEND_EPC "memory-backend-epc"
+
+#define MEMORY_BACKEND_EPC(obj)                                        \
+    OBJECT_CHECK(HostMemoryBackendEpc, (obj), TYPE_MEMORY_BACKEND_EPC)
+
+typedef struct HostMemoryBackendEpc HostMemoryBackendEpc;
+
+struct HostMemoryBackendEpc {
+    HostMemoryBackend parent_obj;
+};
+
+static void
+sgx_epc_backend_memory_alloc(HostMemoryBackend *backend, Error **errp)
+{
+    uint32_t ram_flags;
+    char *name;
+    int fd;
+
+    if (!backend->size) {
+        error_setg(errp, "can't create backend with size 0");
+        return;
+    }
+
+    fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
+    if (fd < 0) {
+        error_setg_errno(errp, errno,
+                         "failed to open /dev/sgx_vepc to alloc SGX EPC");
+        return;
+    }
+
+    name = object_get_canonical_path(OBJECT(backend));
+    ram_flags = (backend->share ? RAM_SHARED : 0) | RAM_PROTECTED;
+    memory_region_init_ram_from_fd(&backend->mr, OBJECT(backend),
+                                   name, backend->size, ram_flags,
+                                   fd, 0, errp);
+    g_free(name);
+}
+
+static void sgx_epc_backend_instance_init(Object *obj)
+{
+    HostMemoryBackend *m = MEMORY_BACKEND(obj);
+
+    m->share = true;
+    m->merge = false;
+    m->dump = false;
+}
+
+static void sgx_epc_backend_class_init(ObjectClass *oc, void *data)
+{
+    HostMemoryBackendClass *bc = MEMORY_BACKEND_CLASS(oc);
+
+    bc->alloc = sgx_epc_backend_memory_alloc;
+}
+
+static const TypeInfo sgx_epc_backed_info = {
+    .name = TYPE_MEMORY_BACKEND_EPC,
+    .parent = TYPE_MEMORY_BACKEND,
+    .instance_init = sgx_epc_backend_instance_init,
+    .class_init = sgx_epc_backend_class_init,
+    .instance_size = sizeof(HostMemoryBackendEpc),
+};
+
+static void register_types(void)
+{
+    int fd = qemu_open_old("/dev/sgx_vepc", O_RDWR);
+    if (fd >= 0) {
+        close(fd);
+
+        type_register_static(&sgx_epc_backed_info);
+    }
+}
+
+type_init(register_types);
diff --git a/backends/meson.build b/backends/meson.build
index d4221831fc..46fd16b269 100644
--- a/backends/meson.build
+++ b/backends/meson.build
@@ -16,5 +16,6 @@ softmmu_ss.add(when: ['CONFIG_VHOST_USER', 'CONFIG_VIRTIO'], if_true: files('vho
 softmmu_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost.c'))
 softmmu_ss.add(when: ['CONFIG_VIRTIO_CRYPTO', 'CONFIG_VHOST_CRYPTO'], if_true: files('cryptodev-vhost-user.c'))
 softmmu_ss.add(when: 'CONFIG_GIO', if_true: [files('dbus-vmstate.c'), gio])
+softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-epc.c'))
 
 subdir('tpm')
-- 
2.29.2.334.gfaefdd61ec



  parent reply	other threads:[~2021-05-11  6:30 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11  6:20 [PATCH v2 00/32] Qemu SGX virtualization Yang Zhong
2021-05-11  6:20 ` [PATCH v2 01/32] memory: Add RAM_PROTECTED flag to skip IOMMU mappings Yang Zhong
2021-05-11  6:20 ` Yang Zhong [this message]
2021-05-11  6:20 ` [PATCH v2 03/32] qom: Add memory-backend-epc ObjectOptions support Yang Zhong
2021-05-11  6:20 ` [PATCH v2 04/32] i386: Add 'sgx-epc' device to expose EPC sections to guest Yang Zhong
2021-05-11  6:20 ` [PATCH v2 05/32] vl: Add "sgx-epc" option to expose SGX " Yang Zhong
2021-05-11  6:20 ` [PATCH v2 06/32] i386: Add primary SGX CPUID and MSR defines Yang Zhong
2021-05-11  6:20 ` [PATCH v2 07/32] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX Yang Zhong
2021-05-11  6:20 ` [PATCH v2 08/32] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX Yang Zhong
2021-05-11  6:20 ` [PATCH v2 09/32] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX Yang Zhong
2021-05-11  6:20 ` [PATCH v2 10/32] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs Yang Zhong
2021-05-11  6:20 ` [PATCH v2 11/32] i386: Add feature control MSR dependency when SGX is enabled Yang Zhong
2021-05-11  6:20 ` [PATCH v2 12/32] i386: Update SGX CPUID info according to hardware/KVM/user input Yang Zhong
2021-05-11  6:20 ` [PATCH v2 13/32] linux-headers: Add placeholder for KVM_CAP_SGX_ATTRIBUTE Yang Zhong
2021-05-11  6:20 ` [PATCH v2 14/32] i386: kvm: Add support for exposing PROVISIONKEY to guest Yang Zhong
2021-05-11  6:20 ` [PATCH v2 15/32] i386: Propagate SGX CPUID sub-leafs to KVM Yang Zhong
2021-05-11  6:20 ` [PATCH v2 16/32] Adjust min CPUID level to 0x12 when SGX is enabled Yang Zhong
2021-05-11  6:20 ` [PATCH v2 17/32] hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly Yang Zhong
2021-05-11  6:20 ` [PATCH v2 18/32] hw/i386/pc: Account for SGX EPC sections when calculating device memory Yang Zhong
2021-05-11  6:20 ` [PATCH v2 19/32] i386/pc: Add e820 entry for SGX EPC section(s) Yang Zhong
2021-05-11  6:20 ` [PATCH v2 20/32] i386: acpi: Add SGX EPC entry to ACPI tables Yang Zhong
2021-05-11  6:20 ` [PATCH v2 21/32] q35: Add support for SGX EPC Yang Zhong
2021-05-11  6:20 ` [PATCH v2 22/32] i440fx: " Yang Zhong
2021-05-11  6:20 ` [PATCH v2 23/32] hostmem: Add the reset interface for EPC backend reset Yang Zhong
2021-05-11  6:20 ` [PATCH v2 24/32] sgx-epc: Add the reset interface for sgx-epc virt device Yang Zhong
2021-05-11  6:20 ` [PATCH v2 25/32] qmp: Add query-sgx command Yang Zhong
2021-05-11  6:20 ` [PATCH v2 26/32] hmp: Add 'info sgx' command Yang Zhong
2021-05-11  6:20 ` [PATCH v2 27/32] i386: Add sgx_get_info() interface Yang Zhong
2021-05-11  6:20 ` [PATCH v2 28/32] bitops: Support 32 and 64 bit mask macro Yang Zhong
2021-05-11  6:20 ` [PATCH v2 29/32] qmp: Add the qmp_query_sgx_capabilities() Yang Zhong
2021-05-11  6:20 ` [PATCH v2 30/32] Kconfig: Add CONFIG_SGX support Yang Zhong
2021-05-11  6:20 ` [PATCH v2 31/32] sgx-epc: Add the fill_device_info() callback support Yang Zhong
2021-05-11  6:20 ` [PATCH v2 32/32] doc: Add the SGX doc Yang Zhong

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