From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/2] drm/i915/adl_p: Disable FIFO underrun recovery
Date: Wed, 26 May 2021 20:35:59 +0300 [thread overview]
Message-ID: <20210526173600.27708-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The FIFO underrun recovery mechanism has a boatload of cases
where it can't be used. The description is also a bit ambiguous
as it doesn't specify whether plane downscaling needs to be considered
or just pipe downscaling. We may not even have sufficient state
tracking to decide this on demand, so for now just disable the
whole thing.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 15 +++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d1ee95512282..a2f3d255a906 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2208,6 +2208,21 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
* across pipe
*/
tmp |= PIXEL_ROUNDING_TRUNC_FB_PASSTHRU;
+
+ /*
+ * "The underrun recovery mechanism should be disabled
+ * when the following is enabled for this pipe:
+ * WiDi
+ * Downscaling (this includes YUV420 fullblend)
+ * COG
+ * DSC
+ * PSR2"
+ *
+ * FIXME: enable whenever possible...
+ */
+ if (IS_ALDERLAKE_P(dev_priv))
+ tmp |= UNDERRUN_RECOVERY_DISABLE;
+
intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4979b4965a82..e4d6336dab71 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8368,6 +8368,7 @@ enum {
#define _PIPEC_CHICKEN 0x72038
#define PIPE_CHICKEN(pipe) _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
_PIPEB_CHICKEN)
+#define UNDERRUN_RECOVERY_DISABLE REG_BIT(30)
#define PIXEL_ROUNDING_TRUNC_FB_PASSTHRU (1 << 15)
#define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7)
--
2.26.3
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2021-05-26 17:36 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-26 17:35 Ville Syrjala [this message]
2021-05-26 17:36 ` [Intel-gfx] [PATCH 2/2] drm/i915/adl_p: Implement Wa_22012358565 Ville Syrjala
2021-05-26 20:48 ` Souza, Jose
2021-05-26 20:33 ` [Intel-gfx] [PATCH 1/2] drm/i915/adl_p: Disable FIFO underrun recovery Souza, Jose
2021-05-26 23:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
2021-05-27 0:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-27 13:05 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210526173600.27708-1-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.