From: Ben Widawsky <ben.widawsky@intel.com>
To: linux-pci@vger.kernel.org
Cc: "Martin Mareš" <mj@ucw.cz>,
"Dan Williams" <dan.j.williams@intel.com>,
"Ben Widawsky" <ben.widawsky@intel.com>
Subject: [PATCH 1/9] cxl: Rename variable to match other code
Date: Fri, 4 Jun 2021 12:05:33 -0700 [thread overview]
Message-ID: <20210604190541.175602-2-ben.widawsky@intel.com> (raw)
In-Reply-To: <20210604190541.175602-1-ben.widawsky@intel.com>
The current variable is word sized, and so this makes the CXL code match
the rest of the code.
---
ls-ecaps.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 99c55ff..edb4401 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -692,7 +692,7 @@ cap_rcec(struct device *d, int where)
static void
cap_dvsec_cxl(struct device *d, int where)
{
- u16 l;
+ u16 w;
printf(": CXL\n");
if (verbose < 2)
@@ -701,19 +701,19 @@ cap_dvsec_cxl(struct device *d, int where)
if (!config_fetch(d, where + PCI_CXL_CAP, 12))
return;
- l = get_conf_word(d, where + PCI_CXL_CAP);
+ w = get_conf_word(d, where + PCI_CXL_CAP);
printf("\t\tCXLCap:\tCache%c IO%c Mem%c Mem HW Init%c HDMCount %d Viral%c\n",
- FLAG(l, PCI_CXL_CAP_CACHE), FLAG(l, PCI_CXL_CAP_IO), FLAG(l, PCI_CXL_CAP_MEM),
- FLAG(l, PCI_CXL_CAP_MEM_HWINIT), PCI_CXL_CAP_HDM_CNT(l), FLAG(l, PCI_CXL_CAP_VIRAL));
+ FLAG(w, PCI_CXL_CAP_CACHE), FLAG(w, PCI_CXL_CAP_IO), FLAG(w, PCI_CXL_CAP_MEM),
+ FLAG(w, PCI_CXL_CAP_MEM_HWINIT), PCI_CXL_CAP_HDM_CNT(w), FLAG(w, PCI_CXL_CAP_VIRAL));
- l = get_conf_word(d, where + PCI_CXL_CTRL);
+ w = get_conf_word(d, where + PCI_CXL_CTRL);
printf("\t\tCXLCtl:\tCache%c IO%c Mem%c Cache SF Cov %d Cache SF Gran %d Cache Clean%c Viral%c\n",
- FLAG(l, PCI_CXL_CTRL_CACHE), FLAG(l, PCI_CXL_CTRL_IO), FLAG(l, PCI_CXL_CTRL_MEM),
- PCI_CXL_CTRL_CACHE_SF_COV(l), PCI_CXL_CTRL_CACHE_SF_GRAN(l), FLAG(l, PCI_CXL_CTRL_CACHE_CLN),
- FLAG(l, PCI_CXL_CTRL_VIRAL));
+ FLAG(w, PCI_CXL_CTRL_CACHE), FLAG(w, PCI_CXL_CTRL_IO), FLAG(w, PCI_CXL_CTRL_MEM),
+ PCI_CXL_CTRL_CACHE_SF_COV(w), PCI_CXL_CTRL_CACHE_SF_GRAN(w), FLAG(w, PCI_CXL_CTRL_CACHE_CLN),
+ FLAG(w, PCI_CXL_CTRL_VIRAL));
- l = get_conf_word(d, where + PCI_CXL_STATUS);
- printf("\t\tCXLSta:\tViral%c\n", FLAG(l, PCI_CXL_STATUS_VIRAL));
+ w = get_conf_word(d, where + PCI_CXL_STATUS);
+ printf("\t\tCXLSta:\tViral%c\n", FLAG(w, PCI_CXL_STATUS_VIRAL));
}
static void
--
2.31.1
next prev parent reply other threads:[~2021-06-04 19:05 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-04 19:05 [PATCH 0/9] Add CXL 2.0 DVSEC Decoding Ben Widawsky
2021-06-04 19:05 ` Ben Widawsky [this message]
2021-06-04 19:05 ` [PATCH 2/9] cxl: Make id check more explicit Ben Widawsky
2021-06-04 19:05 ` [PATCH 3/9] cxl: Collect all DVSEC Device fields Ben Widawsky
2021-06-04 19:05 ` [PATCH 4/9] cxl: Rework caps to new function Ben Widawsky
2021-06-04 19:05 ` [PATCH 5/9] cxl: Rename caps to be device caps Ben Widawsky
2021-06-04 19:05 ` [PATCH 6/9] cxl: Implement more device DVSEC decoding Ben Widawsky
2021-06-07 16:10 ` [PATCH v2 " Ben Widawsky
2021-06-04 19:05 ` [PATCH 7/9] cxl: Add support for DVSEC port cap Ben Widawsky
2021-06-04 19:05 ` [PATCH 8/9] cxl: Add DVSEC Register Locator Ben Widawsky
2021-06-04 19:05 ` [PATCH 9/9] cxl: Add placeholder for undecoded DVSECs Ben Widawsky
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