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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Lara Lazier <laramglazier@gmail.com>
Subject: [PULL 34/45] target/i386: Refactored intercept checks into cpu_svm_has_intercept
Date: Thu, 17 Jun 2021 11:31:23 +0200	[thread overview]
Message-ID: <20210617093134.900014-35-pbonzini@redhat.com> (raw)
In-Reply-To: <20210617093134.900014-1-pbonzini@redhat.com>

From: Lara Lazier <laramglazier@gmail.com>

Added cpu_svm_has_intercept to reduce duplication when checking the
corresponding intercept bit outside of cpu_svm_check_intercept_param

Signed-off-by: Lara Lazier <laramglazier@gmail.com>
Message-Id: <20210616123907.17765-2-laramglazier@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/cpu.h                   |   4 +
 target/i386/tcg/sysemu/svm_helper.c | 133 +++++++++++++++-------------
 2 files changed, 76 insertions(+), 61 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ac3abea97c..64b4e46731 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2149,9 +2149,13 @@ static inline void
 cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
                               uint64_t param, uintptr_t retaddr)
 { /* no-op */ }
+static inline bool
+cpu_svm_has_intercept(CPUX86State *env, uint32_t type)
+{ return false; }
 #else
 void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type,
                                    uint64_t param, uintptr_t retaddr);
+bool cpu_svm_has_intercept(CPUX86State *env, uint32_t type);
 #endif
 
 /* apic.c */
diff --git a/target/i386/tcg/sysemu/svm_helper.c b/target/i386/tcg/sysemu/svm_helper.c
index 9d671297cf..2f7606bebf 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -412,6 +412,43 @@ void helper_clgi(CPUX86State *env)
     env->hflags2 &= ~HF2_GIF_MASK;
 }
 
+bool cpu_svm_has_intercept(CPUX86State *env, uint32_t type)
+{
+    switch (type) {
+    case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8:
+        if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) {
+            return true;
+        }
+        break;
+    case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8:
+        if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) {
+            return true;
+        }
+        break;
+    case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7:
+        if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) {
+            return true;
+        }
+        break;
+    case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7:
+        if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) {
+            return true;
+        }
+        break;
+    case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31:
+        if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) {
+            return true;
+        }
+        break;
+    default:
+        if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) {
+            return true;
+        }
+        break;
+    }
+    return false;
+}
+
 void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
                                    uint64_t param, uintptr_t retaddr)
 {
@@ -420,72 +457,46 @@ void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
     if (likely(!(env->hflags & HF_GUEST_MASK))) {
         return;
     }
-    switch (type) {
-    case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8:
-        if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) {
-            cpu_vmexit(env, type, param, retaddr);
-        }
-        break;
-    case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8:
-        if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) {
-            cpu_vmexit(env, type, param, retaddr);
-        }
-        break;
-    case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7:
-        if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) {
-            cpu_vmexit(env, type, param, retaddr);
-        }
-        break;
-    case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7:
-        if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) {
-            cpu_vmexit(env, type, param, retaddr);
-        }
-        break;
-    case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31:
-        if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) {
-            cpu_vmexit(env, type, param, retaddr);
-        }
-        break;
-    case SVM_EXIT_MSR:
-        if (env->intercept & (1ULL << (SVM_EXIT_MSR - SVM_EXIT_INTR))) {
-            /* FIXME: this should be read in at vmrun (faster this way?) */
-            uint64_t addr = x86_ldq_phys(cs, env->vm_vmcb +
-                                     offsetof(struct vmcb,
-                                              control.msrpm_base_pa));
-            uint32_t t0, t1;
 
-            switch ((uint32_t)env->regs[R_ECX]) {
-            case 0 ... 0x1fff:
-                t0 = (env->regs[R_ECX] * 2) % 8;
-                t1 = (env->regs[R_ECX] * 2) / 8;
-                break;
-            case 0xc0000000 ... 0xc0001fff:
-                t0 = (8192 + env->regs[R_ECX] - 0xc0000000) * 2;
-                t1 = (t0 / 8);
-                t0 %= 8;
-                break;
-            case 0xc0010000 ... 0xc0011fff:
-                t0 = (16384 + env->regs[R_ECX] - 0xc0010000) * 2;
-                t1 = (t0 / 8);
-                t0 %= 8;
-                break;
-            default:
-                cpu_vmexit(env, type, param, retaddr);
-                t0 = 0;
-                t1 = 0;
-                break;
-            }
-            if (x86_ldub_phys(cs, addr + t1) & ((1 << param) << t0)) {
-                cpu_vmexit(env, type, param, retaddr);
-            }
+    if (!cpu_svm_has_intercept(env, type)) {
+        return;
+    }
+
+    if (type == SVM_EXIT_MSR) {
+        /* FIXME: this should be read in at vmrun (faster this way?) */
+        uint64_t addr = x86_ldq_phys(cs, env->vm_vmcb +
+                                    offsetof(struct vmcb,
+                                            control.msrpm_base_pa));
+        uint32_t t0, t1;
+
+        switch ((uint32_t)env->regs[R_ECX]) {
+        case 0 ... 0x1fff:
+            t0 = (env->regs[R_ECX] * 2) % 8;
+            t1 = (env->regs[R_ECX] * 2) / 8;
+            break;
+        case 0xc0000000 ... 0xc0001fff:
+            t0 = (8192 + env->regs[R_ECX] - 0xc0000000) * 2;
+            t1 = (t0 / 8);
+            t0 %= 8;
+            break;
+        case 0xc0010000 ... 0xc0011fff:
+            t0 = (16384 + env->regs[R_ECX] - 0xc0010000) * 2;
+            t1 = (t0 / 8);
+            t0 %= 8;
+            break;
+        default:
+            cpu_vmexit(env, type, param, retaddr);
+            t0 = 0;
+            t1 = 0;
+            break;
         }
-        break;
-    default:
-        if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) {
+        if (x86_ldub_phys(cs, addr + t1) & ((1 << param) << t0)) {
             cpu_vmexit(env, type, param, retaddr);
         }
-        break;
+        return;
     }
+
+    cpu_vmexit(env, type, param, retaddr);
 }
 
 void helper_svm_check_intercept(CPUX86State *env, uint32_t type)
-- 
2.31.1




  parent reply	other threads:[~2021-06-17 10:14 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-17  9:30 [PULL 00/45] Memory, i386, compilation, bugfix changes for 2021-06-17 Paolo Bonzini
2021-06-17  9:30 ` [PULL 01/45] vnc: avoid deprecation warnings for SASL on OS X Paolo Bonzini
2021-06-17  9:30 ` [PULL 02/45] vl: Fix an assert failure in error path Paolo Bonzini
2021-06-17  9:30 ` [PULL 03/45] qemu-config: use qemu_opts_from_qdict Paolo Bonzini
2021-06-17  9:30 ` [PULL 04/45] block/scsi: correctly emulate the VPD block limits page Paolo Bonzini
2021-06-17  9:30 ` [PULL 05/45] runstate: Initialize Error * to NULL Paolo Bonzini
2021-06-17  9:30 ` [PULL 06/45] esp: only assert INTR_DC interrupt flag if selection fails Paolo Bonzini
2021-06-17  9:30 ` [PULL 07/45] esp: only set ESP_RSEQ at the start of the select sequence Paolo Bonzini
2021-06-17  9:30 ` [PULL 08/45] esp: allow non-DMA callback in esp_transfer_data() initial transfer Paolo Bonzini
2021-06-17  9:30 ` [PULL 09/45] esp: handle non-DMA transfers from the target one byte at a time Paolo Bonzini
2021-06-17  9:30 ` [PULL 10/45] esp: ensure PDMA write transfers are flushed from the FIFO to the target immediately Paolo Bonzini
2021-06-17  9:31 ` [PULL 11/45] esp: revert 75ef849696 "esp: correctly fill bus id with requested lun" Paolo Bonzini
2021-06-17  9:31 ` [PULL 12/45] esp: correctly accumulate extended messages for PDMA Paolo Bonzini
2021-06-17  9:31 ` [PULL 13/45] esp: fix migration version check in esp_is_version_5() Paolo Bonzini
2021-06-17  9:31 ` [PULL 14/45] esp: store lun coming from the MESSAGE OUT phase Paolo Bonzini
2021-06-17  9:31 ` [PULL 15/45] softmmu/physmem: Mark shared anonymous memory RAM_SHARED Paolo Bonzini
2021-06-17  9:31 ` [PULL 16/45] softmmu/physmem: Fix ram_block_discard_range() to handle shared anonymous memory Paolo Bonzini
2021-06-17  9:31 ` [PULL 17/45] softmmu/physmem: Fix qemu_ram_remap() " Paolo Bonzini
2021-06-17  9:31 ` [PULL 18/45] util/mmap-alloc: Factor out calculation of the pagesize for the guard page Paolo Bonzini
2021-06-17  9:31 ` [PULL 19/45] util/mmap-alloc: Factor out reserving of a memory region to mmap_reserve() Paolo Bonzini
2021-06-17  9:31 ` [PULL 20/45] util/mmap-alloc: Factor out activating of memory to mmap_activate() Paolo Bonzini
2021-06-17  9:31 ` [PULL 21/45] softmmu/memory: Pass ram_flags to qemu_ram_alloc_from_fd() Paolo Bonzini
2021-06-17  9:31 ` [PULL 22/45] softmmu/memory: Pass ram_flags to memory_region_init_ram_shared_nomigrate() Paolo Bonzini
2021-06-17  9:31 ` [PULL 23/45] softmmu/memory: Pass ram_flags to qemu_ram_alloc() and qemu_ram_alloc_internal() Paolo Bonzini
2021-06-17  9:31 ` [PULL 24/45] util/mmap-alloc: Pass flags instead of separate bools to qemu_ram_mmap() Paolo Bonzini
2021-06-17  9:31 ` [PULL 25/45] memory: Introduce RAM_NORESERVE and wire it up in qemu_ram_mmap() Paolo Bonzini
2021-06-17  9:31 ` [PULL 26/45] util/mmap-alloc: Support RAM_NORESERVE via MAP_NORESERVE under Linux Paolo Bonzini
2021-06-17  9:31 ` [PULL 27/45] hostmem: Wire up RAM_NORESERVE via "reserve" property Paolo Bonzini
2021-06-17  9:31 ` [PULL 28/45] qmp: Clarify memory backend properties returned via query-memdev Paolo Bonzini
2021-06-17  9:31 ` [PULL 29/45] qmp: Include "share" property of memory backends Paolo Bonzini
2021-06-17  9:31 ` [PULL 30/45] hmp: Print "share" property of memory backends with "info memdev" Paolo Bonzini
2021-06-17  9:31 ` [PULL 31/45] qmp: Include "reserve" property of memory backends Paolo Bonzini
2021-06-17  9:31 ` [PULL 32/45] hmp: Print "reserve" property of memory backends with "info memdev" Paolo Bonzini
2021-06-17  9:31 ` [PULL 33/45] configure: map x32 to cpu_family x86_64 for meson Paolo Bonzini
2021-06-17  9:31 ` Paolo Bonzini [this message]
2021-06-17  9:31 ` [PULL 35/45] target/i386: Added consistency checks for VMRUN intercept and ASID Paolo Bonzini
2021-06-17  9:31 ` [PULL 36/45] target/i386: Added consistency checks for CR0 Paolo Bonzini
2021-06-17  9:31 ` [PULL 37/45] target/i386: Added Intercept CR0 writes check Paolo Bonzini
2021-06-17  9:31 ` [PULL 38/45] configure: Use -std=gnu11 Paolo Bonzini
2021-06-17  9:31 ` [PULL 39/45] softfloat: Use _Generic instead of QEMU_GENERIC Paolo Bonzini
2021-06-17  9:31 ` [PULL 40/45] util: Use real functions for thread-posix QemuRecMutex Paolo Bonzini
2021-06-17  9:31 ` [PULL 41/45] util: Pass file+line to qemu_rec_mutex_unlock_impl Paolo Bonzini
2021-06-17  9:31 ` [PULL 42/45] util: Use unique type for QemuRecMutex in thread-posix.h Paolo Bonzini
2021-06-17  9:31 ` [PULL 43/45] include/qemu/lockable: Use _Generic instead of QEMU_GENERIC Paolo Bonzini
2021-06-17  9:31 ` [PULL 44/45] qemu/compiler: Remove QEMU_GENERIC Paolo Bonzini
2021-06-17  9:31 ` [PULL 45/45] configure: Remove probe for _Static_assert Paolo Bonzini
2021-06-17 10:21 ` [PULL 00/45] Memory, i386, compilation, bugfix changes for 2021-06-17 no-reply
2021-06-18  8:53 ` Peter Maydell

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