From: Bjorn Helgaas <helgaas@kernel.org>
To: "David E. Box" <david.e.box@linux.intel.com>
Cc: lee.jones@linaro.org, hdegoede@redhat.com,
mgross@linux.intel.com, bhelgaas@google.com,
linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org,
Dan Williams <dan.j.williams@intel.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: Re: [PATCH 1/4] PCI: Add #defines for accessing PCIE DVSEC fields
Date: Tue, 22 Jun 2021 10:04:15 -0500 [thread overview]
Message-ID: <20210622150415.GA3336733@bjorn-Precision-5520> (raw)
In-Reply-To: <20210617215408.1412409-2-david.e.box@linux.intel.com>
[+cc Dan, Jonathan]
On Thu, Jun 17, 2021 at 02:54:05PM -0700, David E. Box wrote:
> Add #defines for accessing Vendor ID, Revision, Length, and ID offsets
> in the Designated Vendor Specific Extended Capability (DVSEC). Defined
> in PCIe r5.0, sec 7.9.6.
>
> Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
I don't have time right now to really look at the
intel_extended_caps.c patch [1], but I wonder if there's anything
there that could be abstracted and shared with CXL, etc? If not, no
worries.
[1] https://lore.kernel.org/r/20210617215408.1412409-5-david.e.box@linux.intel.com
> ---
> include/uapi/linux/pci_regs.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index e709ae8235e7..57ee51f19283 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -1080,7 +1080,11 @@
>
> /* Designated Vendor-Specific (DVSEC, PCI_EXT_CAP_ID_DVSEC) */
> #define PCI_DVSEC_HEADER1 0x4 /* Designated Vendor-Specific Header1 */
> +#define PCI_DVSEC_HEADER1_VID(x) ((x) & 0xffff)
> +#define PCI_DVSEC_HEADER1_REV(x) (((x) >> 16) & 0xf)
> +#define PCI_DVSEC_HEADER1_LEN(x) (((x) >> 20) & 0xfff)
> #define PCI_DVSEC_HEADER2 0x8 /* Designated Vendor-Specific Header2 */
> +#define PCI_DVSEC_HEADER2_ID(x) ((x) & 0xffff)
>
> /* Data Link Feature */
> #define PCI_DLF_CAP 0x04 /* Capabilities Register */
> --
> 2.25.1
>
next prev parent reply other threads:[~2021-06-22 15:04 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 21:54 [PATCH 0/4] MFD: intel_pmt: Split OOBMSM from intel_pmt driver David E. Box
2021-06-17 21:54 ` [PATCH 1/4] PCI: Add #defines for accessing PCIE DVSEC fields David E. Box
2021-06-22 15:04 ` Bjorn Helgaas [this message]
2021-06-17 21:54 ` [PATCH 2/4] MFD: intel_pmt: Remove OOBMSM device David E. Box
2021-06-30 10:15 ` Lee Jones
2021-06-30 21:11 ` David E. Box
2021-07-01 8:01 ` Lee Jones
2021-07-01 8:39 ` Hans de Goede
2021-07-01 11:23 ` Lee Jones
[not found] ` <CAHp75Vfn6GKSj6USUPEWiPdhWRYcJbirqhU6aOeB4gruekmocg@mail.gmail.com>
2021-07-01 12:06 ` Lee Jones
[not found] ` <CAHp75VdmnRJKSBZ8dmU=7XsGOZ-wX6EpZhtC3X6JEE0mz-UJNg@mail.gmail.com>
2021-07-01 12:26 ` Lee Jones
2021-07-01 22:41 ` David E. Box
2021-07-01 9:43 ` Andy Shevchenko
2021-06-17 21:54 ` [PATCH 3/4] MFD: Intel Out of Band Management Services Module (OOBMSM) driver David E. Box
2021-06-30 10:17 ` Lee Jones
2021-06-17 21:54 ` [PATCH 4/4] MFD: intel-extended-cap: Add support for PCIe VSEC structures David E. Box
2021-11-20 23:17 [PATCH 0/4] Auxiliary bus driver support for Intel PCIe VSEC/DVSEC David E. Box
2021-11-20 23:17 ` [PATCH 1/4] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-11-21 12:24 ` Greg KH
2021-11-21 15:48 ` David E. Box
2021-11-22 18:28 ` Bjorn Helgaas
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