From: Dave Airlie <airlied@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@linux.intel.com, Dave Airlie <airlied@redhat.com>
Subject: [Intel-gfx] [PATCH 07/10] drm/i915/display: move pps_mmio_base to display struct
Date: Mon, 6 Sep 2021 13:43:53 +1000 [thread overview]
Message-ID: <20210906034356.2946530-8-airlied@gmail.com> (raw)
In-Reply-To: <20210906034356.2946530-1-airlied@gmail.com>
From: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
---
drivers/gpu/drm/i915/display/intel_pps.c | 6 +++---
drivers/gpu/drm/i915/i915_drv.h | 4 ++--
drivers/gpu/drm/i915/i915_reg.h | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index a36ec4a818ff..857f3da80e26 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1402,9 +1402,9 @@ void intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv)
void intel_pps_setup(struct drm_i915_private *i915)
{
if (HAS_PCH_SPLIT(i915) || IS_GEMINILAKE(i915) || IS_BROXTON(i915))
- i915->pps_mmio_base = PCH_PPS_BASE;
+ i915->display.pps_mmio_base = PCH_PPS_BASE;
else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
- i915->pps_mmio_base = VLV_PPS_BASE;
+ i915->display.pps_mmio_base = VLV_PPS_BASE;
else
- i915->pps_mmio_base = PPS_BASE;
+ i915->display.pps_mmio_base = PPS_BASE;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2d4cac666de9..4194a2042abf 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -857,6 +857,8 @@ struct drm_i915_display {
/* MMIO base address for MIPI regs */
u32 mipi_mmio_base;
+ u32 pps_mmio_base;
+
struct intel_gmbus gmbus[GMBUS_NUM_PINS];
/** gmbus_mutex protects against concurrent usage of the single hw gmbus
@@ -915,8 +917,6 @@ struct drm_i915_private {
struct intel_wopcm wopcm;
- u32 pps_mmio_base;
-
struct pci_dev *bridge_dev;
struct rb_root uabi_engines;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 948949c15396..7afb6aa554c0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5166,7 +5166,7 @@ enum {
#define VLV_PPS_BASE (VLV_DISPLAY_BASE + PPS_BASE)
#define PCH_PPS_BASE 0xC7200
-#define _MMIO_PPS(pps_idx, reg) _MMIO(dev_priv->pps_mmio_base - \
+#define _MMIO_PPS(pps_idx, reg) _MMIO(dev_priv->display.pps_mmio_base - \
PPS_BASE + (reg) + \
(pps_idx) * 0x100)
--
2.31.1
next prev parent reply other threads:[~2021-09-06 3:51 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-06 3:43 [Intel-gfx] [RFC PATCH 00/10] refactor display structs a little bit Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 01/10] drm/i915: move display funcs into a display struct Dave Airlie
2021-09-06 8:18 ` Jani Nikula
2021-09-06 19:44 ` Dave Airlie
2021-09-07 8:14 ` Daniel Vetter
2021-09-07 9:52 ` Dave Airlie
2021-09-07 18:14 ` Ville Syrjälä
2021-09-08 1:05 ` Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 02/10] drm/i915/display: move cdclk info into display Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 03/10] drm/i915: move more pll/clocks into display struct Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 04/10] drm/i915/display: move gmbus " Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 05/10] drm/i915/display: move intel_dmc " Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 06/10] drm/i915/display: move mipi_mmio_base to " Dave Airlie
2021-09-06 3:43 ` Dave Airlie [this message]
2021-09-06 3:43 ` [Intel-gfx] [PATCH 08/10] drm/i915/drrs: just use some local vars to simplify drrs code Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 09/10] drm/i915/display: move drrs into display struct Dave Airlie
2021-09-06 3:43 ` [Intel-gfx] [PATCH 10/10] drm/i915/display: move fbc " Dave Airlie
2021-09-06 4:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for refactor display structs a little bit Patchwork
2021-09-06 4:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-06 6:07 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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