From: Lucas Tanure <tanureal@opensource.cirrus.com>
To: Mark Brown <broonie@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Sanjay R Mehta <sanju.mehta@amd.com>,
Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com>
Cc: <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<patches@opensource.cirrus.com>,
Lucas Tanure <tanureal@opensource.cirrus.com>
Subject: [PATCH 05/10] spi: amd: Refactor amd_spi_busy_wait
Date: Wed, 8 Sep 2021 12:34:46 +0100 [thread overview]
Message-ID: <20210908113450.788452-6-tanureal@opensource.cirrus.com> (raw)
In-Reply-To: <20210908113450.788452-1-tanureal@opensource.cirrus.com>
Use amd_spi_readreg32 to read 32 bits registers
Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
---
drivers/spi/spi-amd.c | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c
index f23467cf6acd..f2dd8d432aff 100644
--- a/drivers/spi/spi-amd.c
+++ b/drivers/spi/spi-amd.c
@@ -103,21 +103,15 @@ static inline void amd_spi_set_tx_count(struct amd_spi *amd_spi, u8 tx_count)
amd_spi_setclear_reg8(amd_spi, AMD_SPI_TX_COUNT_REG, tx_count, 0xff);
}
-static inline int amd_spi_busy_wait(struct amd_spi *amd_spi)
+static int amd_spi_busy_wait(struct amd_spi *amd_spi)
{
- bool spi_busy;
int timeout = 100000;
/* poll for SPI bus to become idle */
- spi_busy = (ioread32((u8 __iomem *)amd_spi->io_remap_addr +
- AMD_SPI_CTRL0_REG) & AMD_SPI_BUSY) == AMD_SPI_BUSY;
- while (spi_busy) {
+ while (amd_spi_readreg32(amd_spi, AMD_SPI_CTRL0_REG) & AMD_SPI_BUSY) {
usleep_range(10, 20);
if (timeout-- < 0)
return -ETIMEDOUT;
-
- spi_busy = (ioread32((u8 __iomem *)amd_spi->io_remap_addr +
- AMD_SPI_CTRL0_REG) & AMD_SPI_BUSY) == AMD_SPI_BUSY;
}
return 0;
--
2.33.0
next prev parent reply other threads:[~2021-09-08 11:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-08 11:34 [PATCH v2 00/10] Improve support for AMD SPI controllers Lucas Tanure
2021-09-08 11:34 ` [PATCH 01/10] regmap: spi: Set regmap max raw r/w from max_transfer_size Lucas Tanure
2021-09-08 11:34 ` [PATCH 02/10] regmap: spi: Check raw_[read|write] against max message size Lucas Tanure
2021-09-08 13:09 ` Charles Keepax
2021-09-08 13:17 ` Charles Keepax
2021-09-08 11:34 ` [PATCH 03/10] spi: Add flag for no TX after a RX in the same Chip Select Lucas Tanure
2021-09-08 12:37 ` Mark Brown
2021-09-09 10:51 ` Lucas tanure
2021-09-10 14:44 ` Mark Brown
2021-09-08 11:34 ` [PATCH 04/10] spi: amd: Refactor code to use less spi_master_get_devdata Lucas Tanure
2021-09-08 11:34 ` Lucas Tanure [this message]
2021-09-08 11:34 ` [PATCH 06/10] spi: amd: Remove unneeded variable Lucas Tanure
2021-09-08 11:34 ` [PATCH 07/10] spi: amd: Check for idle bus before execute opcode Lucas Tanure
2021-09-08 11:34 ` [PATCH 08/10] spi: amd: Fill FIFO buffer with the whole message Lucas Tanure
2021-09-08 13:22 ` Charles Keepax
2021-09-08 11:34 ` [PATCH 09/10] spi: amd: Add support for latest platform Lucas Tanure
2021-09-12 21:53 ` Gabriel Krisman Bertazi
2021-09-08 12:28 ` [PATCH v2 00/10] Improve support for AMD SPI controllers Mark Brown
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