From: Aleksander Jan Bajkowski <olek2@wp.pl>
To: john@phrozen.org, tsbogend@alpha.franken.de, olek2@wp.pl,
maz@kernel.org, ralf@linux-mips.org, ralph.hempel@lantiq.com,
davem@davemloft.net, kuba@kernel.org, robh+dt@kernel.org,
hauke@hauke-m.de, dev@kresin.me, arnd@arndb.de, jgg@ziepe.ca,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH net-next 3/8] MIPS: lantiq: dma: fix burst length for DEU
Date: Tue, 14 Sep 2021 23:21:00 +0200 [thread overview]
Message-ID: <20210914212105.76186-3-olek2@wp.pl> (raw)
In-Reply-To: <20210914212105.76186-1-olek2@wp.pl>
The current definition of 2W burst length is invalid.
This patch fixes it. Current downstream DEU driver doesn't
use DMA. An incorrect burst length value doesn't cause any
errors. This patch also adds other burst length values.
Fixes: dfec1a827d2b ("MIPS: Lantiq: Add DMA support")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
arch/mips/lantiq/xway/dma.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c
index 364ab39eb8a4..53fcc672a294 100644
--- a/arch/mips/lantiq/xway/dma.c
+++ b/arch/mips/lantiq/xway/dma.c
@@ -41,7 +41,11 @@
#define DMA_IRQ_ACK 0x7e /* IRQ status register */
#define DMA_POLL BIT(31) /* turn on channel polling */
#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */
-#define DMA_2W_BURST BIT(1) /* 2 word burst length */
+#define DMA_PCTRL_2W_BURST 0x1 /* 2 word burst length */
+#define DMA_PCTRL_4W_BURST 0x2 /* 4 word burst length */
+#define DMA_PCTRL_8W_BURST 0x3 /* 8 word burst length */
+#define DMA_TX_BURST_SHIFT 4 /* tx burst shift */
+#define DMA_RX_BURST_SHIFT 2 /* rx burst shift */
#define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */
#define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */
@@ -192,7 +196,8 @@ ltq_dma_init_port(int p)
break;
case DMA_PORT_DEU:
- ltq_dma_w32((DMA_2W_BURST << 4) | (DMA_2W_BURST << 2),
+ ltq_dma_w32((DMA_PCTRL_2W_BURST << DMA_TX_BURST_SHIFT) |
+ (DMA_PCTRL_2W_BURST << DMA_RX_BURST_SHIFT),
LTQ_DMA_PCTRL);
break;
--
2.30.2
next prev parent reply other threads:[~2021-09-14 21:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-14 21:20 [PATCH net-next 1/8] MIPS: lantiq: dma: add small delay after reset Aleksander Jan Bajkowski
2021-09-14 21:20 ` [PATCH net-next 2/8] MIPS: lantiq: dma: reset correct number of channel Aleksander Jan Bajkowski
2021-09-14 21:21 ` Aleksander Jan Bajkowski [this message]
2021-09-14 21:21 ` [PATCH net-next 4/8] MIPS: lantiq: dma: make the burst length configurable by the drivers Aleksander Jan Bajkowski
2021-09-14 22:40 ` Hauke Mehrtens
2021-09-14 21:21 ` [PATCH net-next 5/8] net: lantiq: configure the burst length in ethernet drivers Aleksander Jan Bajkowski
2021-09-14 22:36 ` Hauke Mehrtens
2021-09-19 18:16 ` Aleksander Bajkowski
2021-09-14 21:21 ` [PATCH net-next 6/8] dt-bindings: net: lantiq-xrx200-net: convert to the json-schema Aleksander Jan Bajkowski
2021-09-14 21:21 ` [PATCH net-next 7/8] dt-bindings: net: lantiq,etop-xway: Document Lantiq Xway ETOP bindings Aleksander Jan Bajkowski
2021-09-14 21:21 ` [PATCH net-next 8/8] dt-bindings: net: lantiq: Add the burst length properties Aleksander Jan Bajkowski
2021-09-15 10:30 ` [PATCH net-next 1/8] MIPS: lantiq: dma: add small delay after reset patchwork-bot+netdevbpf
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