From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, Dave Airlie <airlied@redhat.com>
Subject: [Intel-gfx] [CI 07/24] drm/i915: split clock gating init from display vtable
Date: Fri, 24 Sep 2021 14:47:24 +0300 [thread overview]
Message-ID: <20210924114741.15940-7-jani.nikula@intel.com> (raw)
In-Reply-To: <20210924114741.15940-1-jani.nikula@intel.com>
From: Dave Airlie <airlied@redhat.com>
This function is only used inside intel_pm.c
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 9 ++++++-
drivers/gpu/drm/i915/intel_pm.c | 48 ++++++++++++++++-----------------
2 files changed, 32 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a098a1bc83b1..497a466ed0cf 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -323,6 +323,11 @@ struct intel_crtc;
struct intel_limit;
struct dpll;
+/* functions used internal in intel_pm.c */
+struct drm_i915_clock_gating_funcs {
+ void (*init_clock_gating)(struct drm_i915_private *dev_priv);
+};
+
struct drm_i915_display_funcs {
void (*get_cdclk)(struct drm_i915_private *dev_priv,
struct intel_cdclk_config *cdclk_config);
@@ -365,7 +370,6 @@ struct drm_i915_display_funcs {
const struct drm_connector_state *old_conn_state);
void (*fdi_link_train)(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state);
- void (*init_clock_gating)(struct drm_i915_private *dev_priv);
void (*hpd_irq_setup)(struct drm_i915_private *dev_priv);
/* clock updates for mode set */
/* cursor updates */
@@ -954,6 +958,9 @@ struct drm_i915_private {
/* unbound hipri wq for page flips/plane updates */
struct workqueue_struct *flip_wq;
+ /* pm private clock gating functions */
+ struct drm_i915_clock_gating_funcs clock_gating_funcs;
+
/* Display functions */
struct drm_i915_display_funcs display;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 11c9df62391d..34d6faee8969 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7869,7 +7869,7 @@ static void i830_init_clock_gating(struct drm_i915_private *dev_priv)
void intel_init_clock_gating(struct drm_i915_private *dev_priv)
{
- dev_priv->display.init_clock_gating(dev_priv);
+ dev_priv->clock_gating_funcs.init_clock_gating(dev_priv);
}
void intel_suspend_hw(struct drm_i915_private *dev_priv)
@@ -7896,52 +7896,52 @@ static void nop_init_clock_gating(struct drm_i915_private *dev_priv)
void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
{
if (IS_ALDERLAKE_P(dev_priv))
- dev_priv->display.init_clock_gating = adlp_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = adlp_init_clock_gating;
else if (IS_DG1(dev_priv))
- dev_priv->display.init_clock_gating = dg1_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = dg1_init_clock_gating;
else if (GRAPHICS_VER(dev_priv) == 12)
- dev_priv->display.init_clock_gating = gen12lp_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = gen12lp_init_clock_gating;
else if (GRAPHICS_VER(dev_priv) == 11)
- dev_priv->display.init_clock_gating = icl_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = icl_init_clock_gating;
else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
- dev_priv->display.init_clock_gating = cfl_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = cfl_init_clock_gating;
else if (IS_SKYLAKE(dev_priv))
- dev_priv->display.init_clock_gating = skl_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = skl_init_clock_gating;
else if (IS_KABYLAKE(dev_priv))
- dev_priv->display.init_clock_gating = kbl_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = kbl_init_clock_gating;
else if (IS_BROXTON(dev_priv))
- dev_priv->display.init_clock_gating = bxt_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = bxt_init_clock_gating;
else if (IS_GEMINILAKE(dev_priv))
- dev_priv->display.init_clock_gating = glk_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = glk_init_clock_gating;
else if (IS_BROADWELL(dev_priv))
- dev_priv->display.init_clock_gating = bdw_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = bdw_init_clock_gating;
else if (IS_CHERRYVIEW(dev_priv))
- dev_priv->display.init_clock_gating = chv_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = chv_init_clock_gating;
else if (IS_HASWELL(dev_priv))
- dev_priv->display.init_clock_gating = hsw_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = hsw_init_clock_gating;
else if (IS_IVYBRIDGE(dev_priv))
- dev_priv->display.init_clock_gating = ivb_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = ivb_init_clock_gating;
else if (IS_VALLEYVIEW(dev_priv))
- dev_priv->display.init_clock_gating = vlv_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = vlv_init_clock_gating;
else if (GRAPHICS_VER(dev_priv) == 6)
- dev_priv->display.init_clock_gating = gen6_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = gen6_init_clock_gating;
else if (GRAPHICS_VER(dev_priv) == 5)
- dev_priv->display.init_clock_gating = ilk_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = ilk_init_clock_gating;
else if (IS_G4X(dev_priv))
- dev_priv->display.init_clock_gating = g4x_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = g4x_init_clock_gating;
else if (IS_I965GM(dev_priv))
- dev_priv->display.init_clock_gating = i965gm_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = i965gm_init_clock_gating;
else if (IS_I965G(dev_priv))
- dev_priv->display.init_clock_gating = i965g_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = i965g_init_clock_gating;
else if (GRAPHICS_VER(dev_priv) == 3)
- dev_priv->display.init_clock_gating = gen3_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = gen3_init_clock_gating;
else if (IS_I85X(dev_priv) || IS_I865G(dev_priv))
- dev_priv->display.init_clock_gating = i85x_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = i85x_init_clock_gating;
else if (GRAPHICS_VER(dev_priv) == 2)
- dev_priv->display.init_clock_gating = i830_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = i830_init_clock_gating;
else {
MISSING_CASE(INTEL_DEVID(dev_priv));
- dev_priv->display.init_clock_gating = nop_init_clock_gating;
+ dev_priv->clock_gating_funcs.init_clock_gating = nop_init_clock_gating;
}
}
--
2.30.2
next prev parent reply other threads:[~2021-09-24 11:48 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-24 11:47 [Intel-gfx] [CI 01/24] drm/i915/uncore: split the fw get function into separate vfunc Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 02/24] drm/i915/pm: drop get_fifo_size vfunc Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 03/24] drm/i915: make update_wm take a dev_priv Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 04/24] drm/i915/wm: provide wrappers around watermark vfuncs calls (v2) Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 05/24] drm/i915: add wrappers around cdclk vtable funcs Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 06/24] drm/i915/display: add intel_fdi_link_train wrapper Jani Nikula
2021-09-24 11:47 ` Jani Nikula [this message]
2021-09-24 11:47 ` [Intel-gfx] [CI 08/24] drm/i915: split watermark vfuncs from display vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 09/24] drm/i915: split color functions " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 10/24] drm/i915: split audio " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 11/24] drm/i915: split cdclk " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 12/24] drm/i915: split irq hotplug function " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 13/24] drm/i915: split fdi link training " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 14/24] drm/i915: split the dpll clock compute out " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 15/24] drm/i915: constify fdi link training vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 16/24] drm/i915: constify hotplug function vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 17/24] drm/i915: constify color " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 18/24] drm/i915: constify the audio " Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 19/24] drm/i915: constify the dpll clock vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 20/24] drm/i915: constify the cdclk vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 21/24] drm/i915: drop unused function ptr and comments Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 22/24] drm/i915: constify display function vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 23/24] drm/i915: constify clock gating init vtable Jani Nikula
2021-09-24 11:47 ` [Intel-gfx] [CI 24/24] drm/i915: constify display wm vtable Jani Nikula
2021-09-24 14:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/24] drm/i915/uncore: split the fw get function into separate vfunc Patchwork
2021-09-24 15:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-09-27 13:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/24] drm/i915/uncore: split the fw get function into separate vfunc (rev2) Patchwork
2021-09-27 14:18 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210924114741.15940-7-jani.nikula@intel.com \
--to=jani.nikula@intel.com \
--cc=airlied@redhat.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.