From: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
To: herbert@gondor.apana.org.au
Cc: linux-crypto@vger.kernel.org, qat-linux@intel.com,
marco.chiappero@intel.com,
Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Subject: [PATCH v3 12/25] crypto: qat - relocate PFVF VF related logic
Date: Wed, 17 Nov 2021 14:30:45 +0000 [thread overview]
Message-ID: <20211117143058.211550-13-giovanni.cabiddu@intel.com> (raw)
In-Reply-To: <20211117143058.211550-1-giovanni.cabiddu@intel.com>
From: Marco Chiappero <marco.chiappero@intel.com>
Move device specific PFVF logic related to the VF to the newly created
adf_gen2_pfvf.c.
This refactory is done to isolate the GEN2 PFVF code into its own file
in preparation for the introduction of support for PFVF for GEN4
devices.
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
---
drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 2 +-
.../crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c | 8 ++------
.../crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.h | 1 -
drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c | 2 +-
.../crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c | 8 ++------
.../crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.h | 1 -
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c | 15 +++++++++++----
drivers/crypto/qat/qat_common/adf_gen2_pfvf.h | 3 ++-
.../qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 2 +-
.../qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c | 8 ++------
.../qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.h | 1 -
11 files changed, 22 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
index 0bc528004f79..aaf8e65887b8 100644
--- a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
+++ b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
@@ -136,7 +136,7 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data)
hw_data->enable_ints = adf_enable_ints;
hw_data->reset_device = adf_reset_flr;
hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
- hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset;
+ hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset;
hw_data->get_vf2pf_sources = adf_gen2_get_vf2pf_sources;
hw_data->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
hw_data->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
diff --git a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
index 3e69b520e82f..ee61f69a8077 100644
--- a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
+++ b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
@@ -4,6 +4,7 @@
#include <adf_pf2vf_msg.h>
#include <adf_common_drv.h>
#include <adf_gen2_hw_data.h>
+#include <adf_gen2_pfvf.h>
#include "adf_c3xxxvf_hw_data.h"
static struct adf_hw_device_class c3xxxiov_class = {
@@ -47,11 +48,6 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
return DEV_SKU_VF;
}
-static u32 get_pf2vf_offset(u32 i)
-{
- return ADF_C3XXXIOV_PF2VF_OFFSET;
-}
-
static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
{
return 0;
@@ -86,7 +82,7 @@ void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data)
hw_data->get_num_aes = get_num_aes;
hw_data->get_etr_bar_id = get_etr_bar_id;
hw_data->get_misc_bar_id = get_misc_bar_id;
- hw_data->get_pf2vf_offset = get_pf2vf_offset;
+ hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset;
hw_data->get_sku = get_sku;
hw_data->enable_ints = adf_vf_void_noop;
hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
diff --git a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.h b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.h
index f5de4ce66014..6b4bf181d15b 100644
--- a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.h
+++ b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.h
@@ -12,7 +12,6 @@
#define ADF_C3XXXIOV_TX_RINGS_MASK 0xFF
#define ADF_C3XXXIOV_ETR_BAR 0
#define ADF_C3XXXIOV_ETR_MAX_BANKS 1
-#define ADF_C3XXXIOV_PF2VF_OFFSET 0x200
void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
void adf_clean_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data);
diff --git a/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
index 9303f2dbcaf9..0d694c713797 100644
--- a/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
+++ b/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
@@ -138,7 +138,7 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data)
hw_data->enable_ints = adf_enable_ints;
hw_data->reset_device = adf_reset_flr;
hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
- hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset;
+ hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset;
hw_data->get_vf2pf_sources = adf_gen2_get_vf2pf_sources;
hw_data->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
hw_data->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
diff --git a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
index 3bee3e467363..407f3beee43c 100644
--- a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
+++ b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
@@ -4,6 +4,7 @@
#include <adf_pf2vf_msg.h>
#include <adf_common_drv.h>
#include <adf_gen2_hw_data.h>
+#include <adf_gen2_pfvf.h>
#include "adf_c62xvf_hw_data.h"
static struct adf_hw_device_class c62xiov_class = {
@@ -47,11 +48,6 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
return DEV_SKU_VF;
}
-static u32 get_pf2vf_offset(u32 i)
-{
- return ADF_C62XIOV_PF2VF_OFFSET;
-}
-
static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
{
return 0;
@@ -86,7 +82,7 @@ void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
hw_data->get_num_aes = get_num_aes;
hw_data->get_etr_bar_id = get_etr_bar_id;
hw_data->get_misc_bar_id = get_misc_bar_id;
- hw_data->get_pf2vf_offset = get_pf2vf_offset;
+ hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset;
hw_data->get_sku = get_sku;
hw_data->enable_ints = adf_vf_void_noop;
hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
diff --git a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.h b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.h
index 794778c48678..a1a62c003ebf 100644
--- a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.h
+++ b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.h
@@ -12,7 +12,6 @@
#define ADF_C62XIOV_TX_RINGS_MASK 0xFF
#define ADF_C62XIOV_ETR_BAR 0
#define ADF_C62XIOV_ETR_MAX_BANKS 1
-#define ADF_C62XIOV_PF2VF_OFFSET 0x200
void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
void adf_clean_hw_data_c62xiov(struct adf_hw_device_data *hw_data);
diff --git a/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c b/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
index d4d79419daaa..ea8d34922374 100644
--- a/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
+++ b/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
@@ -8,13 +8,20 @@
#define ADF_GEN2_ERR_REG_VF2PF(vf_src) (((vf_src) & 0x01FFFE00) >> 9)
#define ADF_GEN2_ERR_MSK_VF2PF(vf_mask) (((vf_mask) & 0xFFFF) << 9)
-#define ADF_GEN2_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
+#define ADF_GEN2_PF_PF2VF_OFFSET(i) (0x3A000 + 0x280 + ((i) * 0x04))
+#define ADF_GEN2_VF_PF2VF_OFFSET 0x200
-u32 adf_gen2_get_pf2vf_offset(u32 i)
+u32 adf_gen2_pf_get_pf2vf_offset(u32 i)
{
- return ADF_GEN2_PF2VF_OFFSET(i);
+ return ADF_GEN2_PF_PF2VF_OFFSET(i);
}
-EXPORT_SYMBOL_GPL(adf_gen2_get_pf2vf_offset);
+EXPORT_SYMBOL_GPL(adf_gen2_pf_get_pf2vf_offset);
+
+u32 adf_gen2_vf_get_pf2vf_offset(u32 i)
+{
+ return ADF_GEN2_VF_PF2VF_OFFSET;
+}
+EXPORT_SYMBOL_GPL(adf_gen2_vf_get_pf2vf_offset);
u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_addr)
{
diff --git a/drivers/crypto/qat/qat_common/adf_gen2_pfvf.h b/drivers/crypto/qat/qat_common/adf_gen2_pfvf.h
index 0987e254e86b..a21787e3e550 100644
--- a/drivers/crypto/qat/qat_common/adf_gen2_pfvf.h
+++ b/drivers/crypto/qat/qat_common/adf_gen2_pfvf.h
@@ -11,7 +11,8 @@
#define ADF_GEN2_ERRMSK3 (0x3A000 + 0x1C)
#define ADF_GEN2_ERRMSK5 (0x3A000 + 0xDC)
-u32 adf_gen2_get_pf2vf_offset(u32 i);
+u32 adf_gen2_pf_get_pf2vf_offset(u32 i);
+u32 adf_gen2_vf_get_pf2vf_offset(u32 i);
u32 adf_gen2_get_vf2pf_sources(void __iomem *pmisc_bar);
void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);
void adf_gen2_disable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask);
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
index e134385b76a8..5fc2e5a7f10b 100644
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
@@ -215,7 +215,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
hw_data->get_arb_mapping = adf_get_arbiter_mapping;
hw_data->enable_ints = adf_enable_ints;
hw_data->reset_device = adf_reset_sbr;
- hw_data->get_pf2vf_offset = adf_gen2_get_pf2vf_offset;
+ hw_data->get_pf2vf_offset = adf_gen2_pf_get_pf2vf_offset;
hw_data->get_vf2pf_sources = get_vf2pf_sources;
hw_data->enable_vf2pf_interrupts = enable_vf2pf_interrupts;
hw_data->disable_vf2pf_interrupts = disable_vf2pf_interrupts;
diff --git a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
index 7c6ed6bc8abf..30d862226026 100644
--- a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
@@ -4,6 +4,7 @@
#include <adf_pf2vf_msg.h>
#include <adf_common_drv.h>
#include <adf_gen2_hw_data.h>
+#include <adf_gen2_pfvf.h>
#include "adf_dh895xccvf_hw_data.h"
static struct adf_hw_device_class dh895xcciov_class = {
@@ -47,11 +48,6 @@ static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
return DEV_SKU_VF;
}
-static u32 get_pf2vf_offset(u32 i)
-{
- return ADF_DH895XCCIOV_PF2VF_OFFSET;
-}
-
static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
{
return 0;
@@ -86,7 +82,7 @@ void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
hw_data->get_num_aes = get_num_aes;
hw_data->get_etr_bar_id = get_etr_bar_id;
hw_data->get_misc_bar_id = get_misc_bar_id;
- hw_data->get_pf2vf_offset = get_pf2vf_offset;
+ hw_data->get_pf2vf_offset = adf_gen2_vf_get_pf2vf_offset;
hw_data->get_sku = get_sku;
hw_data->enable_ints = adf_vf_void_noop;
hw_data->enable_pfvf_comms = adf_enable_vf2pf_comms;
diff --git a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.h b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.h
index 306ebb71a408..6973fa967bc8 100644
--- a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.h
+++ b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.h
@@ -12,7 +12,6 @@
#define ADF_DH895XCCIOV_TX_RINGS_MASK 0xFF
#define ADF_DH895XCCIOV_ETR_BAR 0
#define ADF_DH895XCCIOV_ETR_MAX_BANKS 1
-#define ADF_DH895XCCIOV_PF2VF_OFFSET 0x200
void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);
void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data);
--
2.33.1
next prev parent reply other threads:[~2021-11-17 14:31 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-17 14:30 [PATCH v3 00/25] crypto: qat - PFVF refactoring Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 01/25] crypto: qat - do not handle PFVF sources for qat_4xxx Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 02/25] crypto: qat - fix undetected PFVF timeout in ACK loop Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 03/25] crypto: qat - refactor PF top half for PFVF Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 04/25] crypto: qat - move vf2pf interrupt helpers Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 05/25] crypto: qat - move VF message handler to adf_vf2pf_msg.c Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 06/25] crypto: qat - move interrupt code out of the PFVF handler Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 07/25] crypto: qat - change PFVF ACK behaviour Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 08/25] crypto: qat - re-enable interrupts for legacy PFVF messages Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 09/25] crypto: qat - split PFVF message decoding from handling Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 10/25] crypto: qat - handle retries due to collisions in adf_iov_putmsg() Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 11/25] crypto: qat - relocate PFVF PF related logic Giovanni Cabiddu
2021-11-17 14:30 ` Giovanni Cabiddu [this message]
2021-11-17 14:30 ` [PATCH v3 13/25] crypto: qat - relocate PFVF disabled function Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 14/25] crypto: qat - add pfvf_ops Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 15/25] crypto: qat - differentiate between pf2vf and vf2pf offset Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 16/25] crypto: qat - abstract PFVF send function Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 17/25] crypto: qat - abstract PFVF receive logic Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 18/25] crypto: qat - reorganize PFVF code Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 19/25] crypto: qat - reorganize PFVF protocol definitions Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 20/25] crypto: qat - use enums for PFVF protocol codes Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 21/25] crypto: qat - pass the PF2VF responses back to the callers Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 22/25] crypto: qat - refactor pfvf version request messages Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 23/25] crypto: qat - do not rely on min version Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 24/25] crypto: qat - fix VF IDs in PFVF log messages Giovanni Cabiddu
2021-11-17 14:30 ` [PATCH v3 25/25] crypto: qat - improve logging of PFVF messages Giovanni Cabiddu
2021-11-26 5:31 ` [PATCH v3 00/25] crypto: qat - PFVF refactoring Herbert Xu
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