From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Xen-devel <xen-devel@lists.xenproject.org>
Cc: "Andrew Cooper" <andrew.cooper3@citrix.com>,
"Jan Beulich" <JBeulich@suse.com>,
"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>
Subject: [PATCH 40/65] x86/pmu: Annotate fnptr targets
Date: Fri, 26 Nov 2021 12:34:21 +0000 [thread overview]
Message-ID: <20211126123446.32324-41-andrew.cooper3@citrix.com> (raw)
In-Reply-To: <20211126123446.32324-1-andrew.cooper3@citrix.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Wei Liu <wl@xen.org>
---
xen/arch/x86/cpu/vpmu_amd.c | 16 ++++++++--------
xen/arch/x86/cpu/vpmu_intel.c | 16 ++++++++--------
xen/arch/x86/oprofile/op_model_athlon.c | 16 ++++++++--------
xen/arch/x86/oprofile/op_model_p4.c | 14 +++++++-------
xen/arch/x86/oprofile/op_model_ppro.c | 26 ++++++++++++++------------
5 files changed, 45 insertions(+), 43 deletions(-)
diff --git a/xen/arch/x86/cpu/vpmu_amd.c b/xen/arch/x86/cpu/vpmu_amd.c
index 38972089ab42..a5487143f77e 100644
--- a/xen/arch/x86/cpu/vpmu_amd.c
+++ b/xen/arch/x86/cpu/vpmu_amd.c
@@ -186,7 +186,7 @@ static void amd_vpmu_unset_msr_bitmap(struct vcpu *v)
msr_bitmap_off(vpmu);
}
-static int amd_vpmu_do_interrupt(struct cpu_user_regs *regs)
+static int cf_check amd_vpmu_do_interrupt(struct cpu_user_regs *regs)
{
return 1;
}
@@ -206,7 +206,7 @@ static inline void context_load(struct vcpu *v)
}
}
-static int amd_vpmu_load(struct vcpu *v, bool_t from_guest)
+static int cf_check amd_vpmu_load(struct vcpu *v, bool from_guest)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
struct xen_pmu_amd_ctxt *ctxt;
@@ -280,7 +280,7 @@ static inline void context_save(struct vcpu *v)
rdmsrl(counters[i], counter_regs[i]);
}
-static int amd_vpmu_save(struct vcpu *v, bool_t to_guest)
+static int cf_check amd_vpmu_save(struct vcpu *v, bool to_guest)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
unsigned int i;
@@ -348,8 +348,8 @@ static void context_update(unsigned int msr, u64 msr_content)
}
}
-static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
- uint64_t supported)
+static int cf_check amd_vpmu_do_wrmsr(
+ unsigned int msr, uint64_t msr_content, uint64_t supported)
{
struct vcpu *v = current;
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -407,7 +407,7 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
return 0;
}
-static int amd_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content)
+static int cf_check amd_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content)
{
struct vcpu *v = current;
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -425,7 +425,7 @@ static int amd_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content)
return 0;
}
-static void amd_vpmu_destroy(struct vcpu *v)
+static void cf_check amd_vpmu_destroy(struct vcpu *v)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -443,7 +443,7 @@ static void amd_vpmu_destroy(struct vcpu *v)
}
/* VPMU part of the 'q' keyhandler */
-static void amd_vpmu_dump(const struct vcpu *v)
+static void cf_check amd_vpmu_dump(const struct vcpu *v)
{
const struct vpmu_struct *vpmu = vcpu_vpmu(v);
const struct xen_pmu_amd_ctxt *ctxt = vpmu->context;
diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index f59cae543868..8b450ec8a8aa 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -288,7 +288,7 @@ static inline void __core2_vpmu_save(struct vcpu *v)
rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, core2_vpmu_cxt->global_status);
}
-static int core2_vpmu_save(struct vcpu *v, bool_t to_guest)
+static int cf_check core2_vpmu_save(struct vcpu *v, bool to_guest)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -407,7 +407,7 @@ static int core2_vpmu_verify(struct vcpu *v)
return 0;
}
-static int core2_vpmu_load(struct vcpu *v, bool_t from_guest)
+static int cf_check core2_vpmu_load(struct vcpu *v, bool from_guest)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -522,8 +522,8 @@ static int core2_vpmu_msr_common_check(u32 msr_index, int *type, int *index)
return 1;
}
-static int core2_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
- uint64_t supported)
+static int cf_check core2_vpmu_do_wrmsr(
+ unsigned int msr, uint64_t msr_content, uint64_t supported)
{
int i, tmp;
int type = -1, index = -1;
@@ -693,7 +693,7 @@ static int core2_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
return 0;
}
-static int core2_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content)
+static int cf_check core2_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content)
{
int type = -1, index = -1;
struct vcpu *v = current;
@@ -733,7 +733,7 @@ static int core2_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content)
}
/* Dump vpmu info on console, called in the context of keyhandler 'q'. */
-static void core2_vpmu_dump(const struct vcpu *v)
+static void cf_check core2_vpmu_dump(const struct vcpu *v)
{
const struct vpmu_struct *vpmu = vcpu_vpmu(v);
unsigned int i;
@@ -778,7 +778,7 @@ static void core2_vpmu_dump(const struct vcpu *v)
}
}
-static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs)
+static int cf_check core2_vpmu_do_interrupt(struct cpu_user_regs *regs)
{
struct vcpu *v = current;
u64 msr_content;
@@ -805,7 +805,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs)
return 1;
}
-static void core2_vpmu_destroy(struct vcpu *v)
+static void cf_check core2_vpmu_destroy(struct vcpu *v)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
diff --git a/xen/arch/x86/oprofile/op_model_athlon.c b/xen/arch/x86/oprofile/op_model_athlon.c
index 2177f02946e2..7bc5853a6c23 100644
--- a/xen/arch/x86/oprofile/op_model_athlon.c
+++ b/xen/arch/x86/oprofile/op_model_athlon.c
@@ -164,7 +164,7 @@ static inline u64 op_amd_randomize_ibs_op(u64 val)
return val;
}
-static void athlon_fill_in_addresses(struct op_msrs * const msrs)
+static void cf_check athlon_fill_in_addresses(struct op_msrs * const msrs)
{
msrs->counters[0].addr = MSR_K7_PERFCTR0;
msrs->counters[1].addr = MSR_K7_PERFCTR1;
@@ -177,7 +177,7 @@ static void athlon_fill_in_addresses(struct op_msrs * const msrs)
msrs->controls[3].addr = MSR_K7_EVNTSEL3;
}
-static void fam15h_fill_in_addresses(struct op_msrs * const msrs)
+static void cf_check fam15h_fill_in_addresses(struct op_msrs * const msrs)
{
msrs->counters[0].addr = MSR_AMD_FAM15H_PERFCTR0;
msrs->counters[1].addr = MSR_AMD_FAM15H_PERFCTR1;
@@ -194,7 +194,7 @@ static void fam15h_fill_in_addresses(struct op_msrs * const msrs)
msrs->controls[5].addr = MSR_AMD_FAM15H_EVNTSEL5;
}
-static void athlon_setup_ctrs(struct op_msrs const * const msrs)
+static void cf_check athlon_setup_ctrs(struct op_msrs const * const msrs)
{
uint64_t msr_content;
int i;
@@ -308,9 +308,9 @@ static inline int handle_ibs(int mode, struct cpu_user_regs const * const regs)
return 1;
}
-static int athlon_check_ctrs(unsigned int const cpu,
- struct op_msrs const * const msrs,
- struct cpu_user_regs const * const regs)
+static int cf_check athlon_check_ctrs(
+ unsigned int const cpu, struct op_msrs const * const msrs,
+ struct cpu_user_regs const * const regs)
{
uint64_t msr_content;
@@ -386,7 +386,7 @@ static inline void start_ibs(void)
}
}
-static void athlon_start(struct op_msrs const * const msrs)
+static void cf_check athlon_start(struct op_msrs const * const msrs)
{
uint64_t msr_content;
int i;
@@ -415,7 +415,7 @@ static void stop_ibs(void)
wrmsrl(MSR_AMD64_IBSOPCTL, 0);
}
-static void athlon_stop(struct op_msrs const * const msrs)
+static void cf_check athlon_stop(struct op_msrs const * const msrs)
{
uint64_t msr_content;
int i;
diff --git a/xen/arch/x86/oprofile/op_model_p4.c b/xen/arch/x86/oprofile/op_model_p4.c
index b08ba53cbd39..d047258644db 100644
--- a/xen/arch/x86/oprofile/op_model_p4.c
+++ b/xen/arch/x86/oprofile/op_model_p4.c
@@ -390,7 +390,7 @@ static unsigned int get_stagger(void)
static unsigned long reset_value[NUM_COUNTERS_NON_HT];
-static void p4_fill_in_addresses(struct op_msrs * const msrs)
+static void cf_check p4_fill_in_addresses(struct op_msrs * const msrs)
{
unsigned int i;
unsigned int addr, stag;
@@ -530,7 +530,7 @@ static void pmc_setup_one_p4_counter(unsigned int ctr)
}
-static void p4_setup_ctrs(struct op_msrs const * const msrs)
+static void cf_check p4_setup_ctrs(struct op_msrs const * const msrs)
{
unsigned int i;
uint64_t msr_content;
@@ -609,9 +609,9 @@ static void p4_setup_ctrs(struct op_msrs const * const msrs)
}
}
-static int p4_check_ctrs(unsigned int const cpu,
- struct op_msrs const * const msrs,
- struct cpu_user_regs const * const regs)
+static int cf_check p4_check_ctrs(
+ unsigned int const cpu, struct op_msrs const * const msrs,
+ struct cpu_user_regs const * const regs)
{
unsigned long ctr, stag, real;
uint64_t msr_content;
@@ -665,7 +665,7 @@ static int p4_check_ctrs(unsigned int const cpu,
}
-static void p4_start(struct op_msrs const * const msrs)
+static void cf_check p4_start(struct op_msrs const * const msrs)
{
unsigned int stag;
uint64_t msr_content;
@@ -683,7 +683,7 @@ static void p4_start(struct op_msrs const * const msrs)
}
-static void p4_stop(struct op_msrs const * const msrs)
+static void cf_check p4_stop(struct op_msrs const * const msrs)
{
unsigned int stag;
uint64_t msr_content;
diff --git a/xen/arch/x86/oprofile/op_model_ppro.c b/xen/arch/x86/oprofile/op_model_ppro.c
index 72c504a10216..8d7e13ea8777 100644
--- a/xen/arch/x86/oprofile/op_model_ppro.c
+++ b/xen/arch/x86/oprofile/op_model_ppro.c
@@ -63,7 +63,7 @@ static int counter_width = 32;
static unsigned long reset_value[OP_MAX_COUNTER];
int ppro_has_global_ctrl = 0;
-static void ppro_fill_in_addresses(struct op_msrs * const msrs)
+static void cf_check ppro_fill_in_addresses(struct op_msrs * const msrs)
{
int i;
@@ -74,7 +74,7 @@ static void ppro_fill_in_addresses(struct op_msrs * const msrs)
}
-static void ppro_setup_ctrs(struct op_msrs const * const msrs)
+static void cf_check ppro_setup_ctrs(struct op_msrs const * const msrs)
{
uint64_t msr_content;
int i;
@@ -128,9 +128,9 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs)
}
}
-static int ppro_check_ctrs(unsigned int const cpu,
- struct op_msrs const * const msrs,
- struct cpu_user_regs const * const regs)
+static int cf_check ppro_check_ctrs(
+ unsigned int const cpu, struct op_msrs const * const msrs,
+ struct cpu_user_regs const * const regs)
{
u64 val;
int i;
@@ -170,7 +170,7 @@ static int ppro_check_ctrs(unsigned int const cpu,
}
-static void ppro_start(struct op_msrs const * const msrs)
+static void cf_check ppro_start(struct op_msrs const * const msrs)
{
uint64_t msr_content;
int i;
@@ -190,7 +190,7 @@ static void ppro_start(struct op_msrs const * const msrs)
}
-static void ppro_stop(struct op_msrs const * const msrs)
+static void cf_check ppro_stop(struct op_msrs const * const msrs)
{
uint64_t msr_content;
int i;
@@ -206,7 +206,7 @@ static void ppro_stop(struct op_msrs const * const msrs)
wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0x0ULL);
}
-static int ppro_is_arch_pmu_msr(u64 msr_index, int *type, int *index)
+static int cf_check ppro_is_arch_pmu_msr(u64 msr_index, int *type, int *index)
{
if ( (msr_index >= MSR_IA32_PERFCTR0) &&
(msr_index < (MSR_IA32_PERFCTR0 + num_counters)) )
@@ -226,7 +226,7 @@ static int ppro_is_arch_pmu_msr(u64 msr_index, int *type, int *index)
return 0;
}
-static int ppro_allocate_msr(struct vcpu *v)
+static int cf_check ppro_allocate_msr(struct vcpu *v)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
struct arch_msr_pair *msr_content;
@@ -245,7 +245,7 @@ static int ppro_allocate_msr(struct vcpu *v)
return 0;
}
-static void ppro_free_msr(struct vcpu *v)
+static void cf_check ppro_free_msr(struct vcpu *v)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -255,7 +255,8 @@ static void ppro_free_msr(struct vcpu *v)
vpmu_reset(vpmu, VPMU_PASSIVE_DOMAIN_ALLOCATED);
}
-static void ppro_load_msr(struct vcpu *v, int type, int index, u64 *msr_content)
+static void cf_check ppro_load_msr(
+ struct vcpu *v, int type, int index, u64 *msr_content)
{
struct arch_msr_pair *msrs = vcpu_vpmu(v)->context;
switch ( type )
@@ -269,7 +270,8 @@ static void ppro_load_msr(struct vcpu *v, int type, int index, u64 *msr_content)
}
}
-static void ppro_save_msr(struct vcpu *v, int type, int index, u64 msr_content)
+static void cf_check ppro_save_msr(
+ struct vcpu *v, int type, int index, u64 msr_content)
{
struct arch_msr_pair *msrs = vcpu_vpmu(v)->context;
--
2.11.0
next prev parent reply other threads:[~2021-11-26 13:08 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 12:33 [PATCH 00/65] x86: Support for CET Indirect Branch Tracking Andrew Cooper
2021-11-26 12:33 ` [PATCH 01/65] x86: Introduce support for CET-IBT Andrew Cooper
2021-11-26 14:10 ` Jan Beulich
2021-11-26 15:21 ` Andrew Cooper
2021-11-29 9:21 ` Jan Beulich
2021-12-10 14:20 ` Andrew Cooper
2021-12-13 7:32 ` Jan Beulich
2021-11-29 9:27 ` Jan Beulich
2021-11-29 10:27 ` Andrew Cooper
2021-11-26 12:33 ` [PATCH 02/65] x86/pv-shim: don't modify hypercall table Andrew Cooper
2021-11-26 12:33 ` [PATCH 03/65] xen/x86: don't use hypercall table for calling compat hypercalls Andrew Cooper
2021-11-26 12:33 ` [PATCH 04/65] x86/hypercall: Annotate fnptr targets Andrew Cooper
2021-11-26 14:21 ` Jan Beulich
2021-11-26 14:28 ` Andrew Cooper
2021-11-29 9:38 ` Jan Beulich
2021-11-29 10:00 ` Jan Beulich
2021-11-26 12:33 ` [PATCH 05/65] xen: Annotate fnptr targets from custom_param() Andrew Cooper
2021-11-26 12:33 ` [PATCH 06/65] xen: Annotate fnptr targets from __initcall() Andrew Cooper
2021-11-26 12:33 ` [PATCH 07/65] xen: Annotate fnptr targets from notifier callbacks Andrew Cooper
2021-11-26 12:33 ` [PATCH 08/65] xen: Annotate fnptr targets from acpi_table_parse() Andrew Cooper
2021-12-06 8:36 ` Jan Beulich
2021-12-10 14:44 ` Andrew Cooper
2021-12-13 7:46 ` Jan Beulich
2021-11-26 12:33 ` [PATCH 09/65] xen: Annotate fnptr targets from continue_hypercall_on_cpu() Andrew Cooper
2021-11-26 12:33 ` [PATCH 10/65] xen: Annotate fnptr targets from init_timer() Andrew Cooper
2021-11-26 12:33 ` [PATCH 11/65] xen: Annotate fnptr targets from call_rcu() Andrew Cooper
2021-11-26 12:33 ` [PATCH 12/65] xen: Annotate fnptr targets from IPIs Andrew Cooper
2021-11-26 12:33 ` [PATCH 13/65] xen: Annotate fnptr targets from open_softirq() Andrew Cooper
2021-11-26 12:33 ` [PATCH 14/65] xsm/flask: Annotate fnptr targets in the security server Andrew Cooper
2021-12-03 10:44 ` Daniel P. Smith
2021-11-26 12:33 ` [PATCH 15/65] xsm: Annotate fnptr targets Andrew Cooper
2021-12-03 10:46 ` Daniel P. Smith
2021-11-26 12:33 ` [PATCH 16/65] xen/sched: " Andrew Cooper
2021-11-26 12:33 ` [PATCH 17/65] xen/evtchn: " Andrew Cooper
2021-11-29 13:51 ` Jan Beulich
2021-11-26 12:33 ` [PATCH 18/65] xen/hypfs: " Andrew Cooper
2021-12-02 11:35 ` Juergen Gross
2021-11-26 12:34 ` [PATCH 19/65] xen/tasklet: " Andrew Cooper
2021-11-29 13:56 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 20/65] xen/keyhandler: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 21/65] xen/vpci: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 22/65] xen/decompress: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 23/65] xen/iommu: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 24/65] xen/video: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 25/65] xen/console: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 26/65] xen/misc: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 27/65] x86: Annotate fnptr targets from request_irq() Andrew Cooper
2021-11-26 12:34 ` [PATCH 28/65] x86/hvm: Annotate fnptr targets from hvm_funcs Andrew Cooper
2021-11-29 14:14 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 29/65] x86/hvm: Annotate fnptr targets from device emulation Andrew Cooper
2021-11-26 12:34 ` [PATCH 30/65] x86/emul: Annotate fnptr targets Andrew Cooper
2021-11-29 14:22 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 31/65] x86/ucode: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 32/65] x86/power: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 33/65] x86/apic: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 34/65] x86/nmi: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 35/65] x86/mtrr: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 36/65] x86/idle: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 37/65] x86/quirks: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 38/65] x86/hvmsave: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 39/65] x86/mce: " Andrew Cooper
2021-11-26 12:34 ` Andrew Cooper [this message]
2021-11-26 12:34 ` [PATCH 41/65] x86/cpu: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 42/65] x86/guest: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 43/65] x86/logdirty: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 44/65] x86/shadow: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 45/65] x86/hap: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 46/65] x86/p2m: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 47/65] x86/irq: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 48/65] x86/aepi: " Andrew Cooper
2021-11-29 14:33 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 49/65] x86/psr: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 50/65] x86/dpci: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 51/65] x86/pt: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 52/65] x86/time: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 53/65] x86/misc: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 54/65] x86/stack: " Andrew Cooper
2021-11-29 14:41 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 55/65] x86/bugframe: " Andrew Cooper
2021-11-26 12:34 ` [PATCH 56/65] x86: Use control flow typechecking where possible Andrew Cooper
2021-11-26 12:34 ` [PATCH 57/65] x86/setup: Read CR4 earlier in __start_xen() Andrew Cooper
2021-12-03 12:58 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 58/65] x86/alternatives: Clear CR4.CET when clearing CR0.WP Andrew Cooper
2021-12-03 12:59 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 59/65] x86/traps: Rework write_stub_trampoline() to not hardcode the jmp Andrew Cooper
2021-12-03 13:17 ` Jan Beulich
2021-12-03 13:59 ` Andrew Cooper
2021-12-03 14:03 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 60/65] x86/emul: Update emulation stubs to be CET-IBT compatible Andrew Cooper
2021-11-26 12:34 ` [PATCH 61/65] x86/entry: Make syscall/sysenter entrypoints " Andrew Cooper
2021-11-26 12:34 ` [PATCH 62/65] x86/entry: Make IDT " Andrew Cooper
2021-12-03 13:23 ` Jan Beulich
2021-12-03 14:12 ` Andrew Cooper
2021-12-03 13:32 ` Jan Beulich
2021-12-03 15:30 ` Andrew Cooper
2021-12-06 9:42 ` Jan Beulich
2021-12-06 11:38 ` Andrew Cooper
2021-12-06 12:27 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 63/65] x86/setup: Rework MSR_S_CET handling for CET-IBT Andrew Cooper
2021-12-06 10:49 ` Jan Beulich
2021-12-10 16:19 ` Andrew Cooper
2021-12-10 16:47 ` Jan Beulich
2021-11-26 12:34 ` [PATCH 64/65] x86/efi: Disable CET-IBT around Runtime Services calls Andrew Cooper
2021-11-26 12:34 ` [PATCH 65/65] x86: Enable CET Indirect Branch Tracking Andrew Cooper
2021-12-06 11:24 ` Jan Beulich
2021-11-26 12:48 ` [PATCH 00/65] x86: Support for " Jan Beulich
2021-11-26 13:13 ` Andrew Cooper
2021-11-26 13:21 ` Andrew Cooper
2021-11-26 13:22 ` Jan Beulich
2021-11-26 23:49 ` Andrew Cooper
2021-11-29 9:18 ` Jan Beulich
2021-11-26 16:33 ` [PATCH 59.5/65] x86: Introduce helpers/checks for endbr64 instructions Andrew Cooper
2021-11-26 18:26 ` Marek Marczykowski-Górecki
2021-11-26 18:29 ` Andrew Cooper
2021-12-03 13:59 ` Jan Beulich
2021-12-03 14:10 ` Andrew Cooper
2021-12-06 8:04 ` Jan Beulich
2021-11-26 16:37 ` [PATCH v1.1 60/65] x86/emul: Update emulation stubs to be CET-IBT compatible Andrew Cooper
2021-12-03 13:39 ` Jan Beulich
2021-11-26 16:37 ` [PATCH v1.1 61/65] x86/entry: Make syscall/sysenter entrypoints " Andrew Cooper
2021-12-03 13:48 ` Jan Beulich
2021-11-26 16:38 ` [PATCH v1.1 64/65] x86/efi: Disable CET-IBT around Runtime Services calls Andrew Cooper
2021-12-06 11:06 ` Jan Beulich
2021-12-10 17:16 ` Andrew Cooper
2021-12-13 7:52 ` Jan Beulich
2021-11-29 14:44 ` [PATCH 00/65] x86: Support for CET Indirect Branch Tracking Jan Beulich
2021-11-29 15:09 ` Andrew Cooper
2021-11-29 16:17 ` Jan Beulich
2021-12-02 10:31 ` Dario Faggioli
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