From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH v3 3/5] pinctrl: qcom: Move chip specific functions to right files
Date: Tue, 30 Nov 2021 18:38:23 +0800 [thread overview]
Message-ID: <202111301848.t0EBmRw2-lkp@intel.com> (raw)
In-Reply-To: <1638179932-3353-4-git-send-email-srivasam@codeaurora.org>
[-- Attachment #1: Type: text/plain, Size: 9635 bytes --]
Hi Srinivasa,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linusw-pinctrl/devel]
[also build test ERROR on v5.16-rc3 next-20211130]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Srinivasa-Rao-Mandadapu/Add-pin-control-support-for-lpass-sc7280/20211129-180254
base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20211130/202111301848.t0EBmRw2-lkp(a)intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/08f308b432fbb4f1eb2c05d94058fd365d79627a
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Srinivasa-Rao-Mandadapu/Add-pin-control-support-for-lpass-sc7280/20211129-180254
git checkout 08f308b432fbb4f1eb2c05d94058fd365d79627a
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm SHELL=/bin/bash arch/arm/common/ drivers/pinctrl/qcom/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c: In function 'lpi_gpio_set_mux':
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:113:9: error: implicit declaration of function 'u32p_replace_bits' [-Werror=implicit-function-declaration]
113 | u32p_replace_bits(&val, i, LPI_GPIO_FUNCTION_MASK);
| ^~~~~~~~~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c: In function 'lpi_config_get':
>> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:138:16: error: implicit declaration of function 'FIELD_GET' [-Werror=implicit-function-declaration]
138 | pull = FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg);
| ^~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c: In function 'lpi_config_set':
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:244:23: error: implicit declaration of function 'u32_encode_bits' [-Werror=implicit-function-declaration]
244 | val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
| ^~~~~~~~~~~~~~~
In file included from drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:15:
At top level:
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:133:27: warning: 'gpio13_pins' defined but not used [-Wunused-const-variable=]
133 | static const unsigned int gpio13_pins[] = { 13 };
| ^~~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:132:27: warning: 'gpio12_pins' defined but not used [-Wunused-const-variable=]
132 | static const unsigned int gpio12_pins[] = { 12 };
| ^~~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:131:27: warning: 'gpio11_pins' defined but not used [-Wunused-const-variable=]
131 | static const unsigned int gpio11_pins[] = { 11 };
| ^~~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:130:27: warning: 'gpio10_pins' defined but not used [-Wunused-const-variable=]
130 | static const unsigned int gpio10_pins[] = { 10 };
| ^~~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:129:27: warning: 'gpio9_pins' defined but not used [-Wunused-const-variable=]
129 | static const unsigned int gpio9_pins[] = { 9 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:128:27: warning: 'gpio8_pins' defined but not used [-Wunused-const-variable=]
128 | static const unsigned int gpio8_pins[] = { 8 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:127:27: warning: 'gpio7_pins' defined but not used [-Wunused-const-variable=]
127 | static const unsigned int gpio7_pins[] = { 7 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:126:27: warning: 'gpio6_pins' defined but not used [-Wunused-const-variable=]
126 | static const unsigned int gpio6_pins[] = { 6 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:125:27: warning: 'gpio5_pins' defined but not used [-Wunused-const-variable=]
125 | static const unsigned int gpio5_pins[] = { 5 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:124:27: warning: 'gpio4_pins' defined but not used [-Wunused-const-variable=]
124 | static const unsigned int gpio4_pins[] = { 4 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:123:27: warning: 'gpio3_pins' defined but not used [-Wunused-const-variable=]
123 | static const unsigned int gpio3_pins[] = { 3 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:122:27: warning: 'gpio2_pins' defined but not used [-Wunused-const-variable=]
122 | static const unsigned int gpio2_pins[] = { 2 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:121:27: warning: 'gpio1_pins' defined but not used [-Wunused-const-variable=]
121 | static const unsigned int gpio1_pins[] = { 1 };
| ^~~~~~~~~~
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h:120:27: warning: 'gpio0_pins' defined but not used [-Wunused-const-variable=]
120 | static const unsigned int gpio0_pins[] = { 0 };
| ^~~~~~~~~~
cc1: some warnings being treated as errors
vim +/FIELD_GET +138 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
6e261d1090d6db Srinivas Kandagatla 2020-12-02 125
6e261d1090d6db Srinivas Kandagatla 2020-12-02 126 static int lpi_config_get(struct pinctrl_dev *pctldev,
6e261d1090d6db Srinivas Kandagatla 2020-12-02 127 unsigned int pin, unsigned long *config)
6e261d1090d6db Srinivas Kandagatla 2020-12-02 128 {
6e261d1090d6db Srinivas Kandagatla 2020-12-02 129 unsigned int param = pinconf_to_config_param(*config);
6e261d1090d6db Srinivas Kandagatla 2020-12-02 130 struct lpi_pinctrl *state = dev_get_drvdata(pctldev->dev);
6e261d1090d6db Srinivas Kandagatla 2020-12-02 131 unsigned int arg = 0;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 132 int is_out;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 133 int pull;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 134 u32 ctl_reg;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 135
6e261d1090d6db Srinivas Kandagatla 2020-12-02 136 ctl_reg = lpi_gpio_read(state, pin, LPI_GPIO_CFG_REG);
6e261d1090d6db Srinivas Kandagatla 2020-12-02 137 is_out = ctl_reg & LPI_GPIO_OE_MASK;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 @138 pull = FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg);
6e261d1090d6db Srinivas Kandagatla 2020-12-02 139
6e261d1090d6db Srinivas Kandagatla 2020-12-02 140 switch (param) {
6e261d1090d6db Srinivas Kandagatla 2020-12-02 141 case PIN_CONFIG_BIAS_DISABLE:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 142 if (pull == LPI_GPIO_BIAS_DISABLE)
6e261d1090d6db Srinivas Kandagatla 2020-12-02 143 arg = 1;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 144 break;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 145 case PIN_CONFIG_BIAS_PULL_DOWN:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 146 if (pull == LPI_GPIO_PULL_DOWN)
6e261d1090d6db Srinivas Kandagatla 2020-12-02 147 arg = 1;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 148 break;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 149 case PIN_CONFIG_BIAS_BUS_HOLD:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 150 if (pull == LPI_GPIO_KEEPER)
6e261d1090d6db Srinivas Kandagatla 2020-12-02 151 arg = 1;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 152 break;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 153 case PIN_CONFIG_BIAS_PULL_UP:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 154 if (pull == LPI_GPIO_PULL_UP)
6e261d1090d6db Srinivas Kandagatla 2020-12-02 155 arg = 1;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 156 break;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 157 case PIN_CONFIG_INPUT_ENABLE:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 158 case PIN_CONFIG_OUTPUT:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 159 if (is_out)
6e261d1090d6db Srinivas Kandagatla 2020-12-02 160 arg = 1;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 161 break;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 162 default:
6e261d1090d6db Srinivas Kandagatla 2020-12-02 163 return -EINVAL;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 164 }
6e261d1090d6db Srinivas Kandagatla 2020-12-02 165
6e261d1090d6db Srinivas Kandagatla 2020-12-02 166 *config = pinconf_to_config_packed(param, arg);
6e261d1090d6db Srinivas Kandagatla 2020-12-02 167 return 0;
6e261d1090d6db Srinivas Kandagatla 2020-12-02 168 }
6e261d1090d6db Srinivas Kandagatla 2020-12-02 169
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
next prev parent reply other threads:[~2021-11-30 10:38 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-29 9:58 [PATCH v3 0/5] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2021-11-29 9:58 ` [PATCH v3 1/5] dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific Srinivasa Rao Mandadapu
2021-11-29 9:58 ` Srinivasa Rao Mandadapu
2021-11-29 15:30 ` Rob Herring
2021-11-29 15:30 ` Rob Herring
2021-11-30 17:12 ` Srinivas Kandagatla
2021-11-29 9:58 ` [PATCH v3 2/5] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings Srinivasa Rao Mandadapu
2021-11-29 9:58 ` Srinivasa Rao Mandadapu
2021-11-29 15:30 ` Rob Herring
2021-11-29 15:30 ` Rob Herring
2021-11-29 9:58 ` [PATCH v3 3/5] pinctrl: qcom: Move chip specific functions to right files Srinivasa Rao Mandadapu
2021-11-29 9:58 ` Srinivasa Rao Mandadapu
2021-11-30 10:38 ` kernel test robot [this message]
2021-11-30 18:38 ` kernel test robot
2021-12-01 10:41 ` Srinivas Kandagatla
2021-12-01 14:33 ` Srinivasa Rao Mandadapu
2021-12-01 15:07 ` Srinivas Kandagatla
2021-12-01 15:11 ` Srinivasa Rao Mandadapu
2021-11-29 9:58 ` [PATCH v3 4/5] pinctrl: qcom: Update clock voting as optional Srinivasa Rao Mandadapu
2021-11-29 9:58 ` Srinivasa Rao Mandadapu
2021-11-29 9:58 ` [PATCH v3 5/5] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2021-11-29 9:58 ` Srinivasa Rao Mandadapu
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