[PATCH v2 0/2] AMD SMCA Updates

From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <tony.luck@intel.com>,
	<x86@kernel.org>, <Smita.KoralahalliChannabasappa@amd.com>,
	<william.roche@oracle.com>, <alexander.deucher@amd.com>,
	<mukul.joshi@amd.com>, Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 0/2] AMD SMCA Updates
Date: Thu, 16 Dec 2021 16:29:03 +0000	[thread overview]
Message-ID: <20211216162905.4132657-1-yazen.ghannam@amd.com> (raw)

Hi all,

This set adds supports for SMCA changes in future AMD systems.

Patch 1 adds new bank types and error descriptions used in future AMD
systems.

Patch 2 adjusts how SMCA bank information is cached. Future AMD systems
will have different bank type layouts between logical CPUs. So having a
single system-wide cache of the layout won't be correct.

Patch 1 from V1 was dropped from this set. I plan to send another set
for the thresholding sysfs updates discussed here:
https://lkml.kernel.org/r/20211203020017.728440-2-yazen.ghannam@amd.com

I expect there will be a few patches for adding the new interface,
removing the old interface and stale data strucutures, and documenting
the new interface.

Thanks,
Yazen

Link:
https://lkml.kernel.org/r/20211203020017.728440-1-yazen.ghannam@amd.com

v1->v2:
* Drop patch 1 from v1 set and rework the remaining patches.

Yazen Ghannam (2):
  x86/MCE/AMD, EDAC/mce_amd: Add new SMCA Bank Types
  x86/MCE/AMD, EDAC/mce_amd: Support non-uniform MCA bank type
    enumeration

 arch/x86/include/asm/mce.h              |  25 ++--
 arch/x86/kernel/cpu/mce/amd.c           |  87 ++++++++++----
 drivers/edac/mce_amd.c                  | 146 +++++++++++++++++++++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c |   2 +-
 4 files changed, 202 insertions(+), 58 deletions(-)

-- 
2.25.1