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From: matheus.ferst@eldorado.org.br
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: danielhb413@gmail.com, richard.henderson@linaro.org,
	groug@kaod.org, "Víctor Colombo" <victor.colombo@eldorado.org.br>,
	clg@kaod.org, "Matheus Ferst" <matheus.ferst@eldorado.org.br>,
	david@gibson.dropbear.id.au
Subject: [PATCH v2 31/38] target/ppc: Refactor VSX_SCALAR_CMP_DP
Date: Tue, 25 Jan 2022 09:19:36 -0300	[thread overview]
Message-ID: <20220125121943.3269077-32-matheus.ferst@eldorado.org.br> (raw)
In-Reply-To: <20220125121943.3269077-1-matheus.ferst@eldorado.org.br>

From: Víctor Colombo <victor.colombo@eldorado.org.br>

Refactor VSX_SCALAR_CMP_DP, changing its name to VSX_SCALAR_CMP and
prepare the helper to be used for quadword comparisons.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
 target/ppc/fpu_helper.c | 31 ++++++++++++++-----------------
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 6b0296525b..4a73186155 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2265,28 +2265,30 @@ VSX_MADDQ(XSNMSUBQP, NMSUB_FLGS, 0)
 VSX_MADDQ(XSNMSUBQPO, NMSUB_FLGS, 0)
 
 /*
- * VSX_SCALAR_CMP_DP - VSX scalar floating point compare double precision
+ * VSX_SCALAR_CMP - VSX scalar floating point compare
  *   op    - instruction mnemonic
+ *   tp    - type
  *   cmp   - comparison operation
  *   exp   - expected result of comparison
+ *   fld   - vsr_t field
  *   svxvc - set VXVC bit
  */
-#define VSX_SCALAR_CMP_DP(op, cmp, exp, svxvc)                                \
+#define VSX_SCALAR_CMP(op, tp, cmp, fld, exp, svxvc)                          \
 void helper_##op(CPUPPCState *env, ppc_vsr_t *xt,                             \
                  ppc_vsr_t *xa, ppc_vsr_t *xb)                                \
 {                                                                             \
-    ppc_vsr_t t = *xt;                                                        \
+    ppc_vsr_t t = { };                                                        \
     bool vxsnan_flag = false, vxvc_flag = false, vex_flag = false;            \
                                                                               \
-    if (float64_is_signaling_nan(xa->VsrD(0), &env->fp_status) ||             \
-        float64_is_signaling_nan(xb->VsrD(0), &env->fp_status)) {             \
+    if (tp##_is_signaling_nan(xa->fld, &env->fp_status) ||                    \
+        tp##_is_signaling_nan(xb->fld, &env->fp_status)) {                    \
         vxsnan_flag = true;                                                   \
         if (fpscr_ve == 0 && svxvc) {                                         \
             vxvc_flag = true;                                                 \
         }                                                                     \
     } else if (svxvc) {                                                       \
-        vxvc_flag = float64_is_quiet_nan(xa->VsrD(0), &env->fp_status) ||     \
-            float64_is_quiet_nan(xb->VsrD(0), &env->fp_status);               \
+        vxvc_flag = tp##_is_quiet_nan(xa->fld, &env->fp_status) ||            \
+            tp##_is_quiet_nan(xb->fld, &env->fp_status);                      \
     }                                                                         \
     if (vxsnan_flag) {                                                        \
         float_invalid_op_vxsnan(env, GETPC());                                \
@@ -2297,22 +2299,17 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt,                             \
     vex_flag = fpscr_ve && (vxvc_flag || vxsnan_flag);                        \
                                                                               \
     if (!vex_flag) {                                                          \
-        if (float64_##cmp(xb->VsrD(0), xa->VsrD(0),                           \
-                          &env->fp_status) == exp) {                          \
-            t.VsrD(0) = -1;                                                   \
-            t.VsrD(1) = 0;                                                    \
-        } else {                                                              \
-            t.VsrD(0) = 0;                                                    \
-            t.VsrD(1) = 0;                                                    \
+        if (tp##_##cmp(xb->fld, xa->fld, &env->fp_status) == exp) {           \
+            memset(&t.fld, 0xFF, sizeof(t.fld));                              \
         }                                                                     \
     }                                                                         \
     *xt = t;                                                                  \
     do_float_check_status(env, GETPC());                                      \
 }
 
-VSX_SCALAR_CMP_DP(xscmpeqdp, eq, 1, 0)
-VSX_SCALAR_CMP_DP(xscmpgedp, le, 1, 1)
-VSX_SCALAR_CMP_DP(xscmpgtdp, lt, 1, 1)
+VSX_SCALAR_CMP(xscmpeqdp, float64, eq, VsrD(0), 1, 0)
+VSX_SCALAR_CMP(xscmpgedp, float64, le, VsrD(0), 1, 1)
+VSX_SCALAR_CMP(xscmpgtdp, float64, lt, VsrD(0), 1, 1)
 
 void helper_xscmpexpdp(CPUPPCState *env, uint32_t opcode,
                        ppc_vsr_t *xa, ppc_vsr_t *xb)
-- 
2.25.1



  parent reply	other threads:[~2022-01-25 14:41 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-25 12:19 [PATCH v2 00/38] target/ppc: PowerISA Vector/VSX instruction batch matheus.ferst
2022-01-25 12:19 ` [PATCH v2 01/38] target/ppc: Introduce TRANS*FLAGS macros matheus.ferst
2022-01-25 12:19 ` [PATCH v2 02/38] target/ppc: moved vector even and odd multiplication to decodetree matheus.ferst
2022-01-25 12:19 ` [PATCH v2 03/38] target/ppc: Moved vector multiply high and low " matheus.ferst
2022-01-25 12:19 ` [PATCH v2 04/38] target/ppc: vmulh* instructions use gvec matheus.ferst
2022-01-25 12:19 ` [PATCH v2 05/38] target/ppc: Implement vmsumcud instruction matheus.ferst
2022-01-25 12:19 ` [PATCH v2 06/38] target/ppc: Implement vmsumudm instruction matheus.ferst
2022-01-25 12:19 ` [PATCH v2 07/38] target/ppc: Move vexts[bhw]2[wd] to decodetree matheus.ferst
2022-01-25 12:19 ` [PATCH v2 08/38] target/ppc: Implement vextsd2q matheus.ferst
2022-01-25 12:19 ` [PATCH v2 09/38] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree matheus.ferst
2022-01-25 12:19 ` [PATCH v2 10/38] target/ppc: Move Vector Compare Not Equal or Zero " matheus.ferst
2022-01-25 12:19 ` [PATCH v2 11/38] target/ppc: Implement Vector Compare Equal Quadword matheus.ferst
2022-01-25 12:19 ` [PATCH v2 12/38] target/ppc: Implement Vector Compare Greater Than Quadword matheus.ferst
2022-01-25 12:19 ` [PATCH v2 13/38] target/ppc: Implement Vector Compare Quadword matheus.ferst
2022-01-25 12:19 ` [PATCH v2 14/38] target/ppc: implement vstri[bh][lr] matheus.ferst
2022-01-25 12:19 ` [PATCH v2 15/38] target/ppc: implement vclrlb matheus.ferst
2022-01-25 12:19 ` [PATCH v2 16/38] target/ppc: implement vclrrb matheus.ferst
2022-01-25 12:19 ` [PATCH v2 17/38] target/ppc: implement vcntmb[bhwd] matheus.ferst
2022-01-25 12:19 ` [PATCH v2 18/38] target/ppc: implement vgnb matheus.ferst
2022-01-25 12:19 ` [PATCH v2 19/38] target/ppc: Move vsel and vperm/vpermr to decodetree matheus.ferst
2022-01-25 12:19 ` [PATCH v2 20/38] target/ppc: Move xxsel " matheus.ferst
2022-01-25 12:19 ` [PATCH v2 21/38] target/ppc: move xxperm/xxpermr " matheus.ferst
2022-01-25 12:19 ` [PATCH v2 22/38] target/ppc: Move xxpermdi " matheus.ferst
2022-01-25 12:19 ` [PATCH v2 23/38] target/ppc: Implement xxpermx instruction matheus.ferst
2022-01-25 12:19 ` [PATCH v2 24/38] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i matheus.ferst
2022-01-25 12:19 ` [PATCH v2 25/38] target/ppc: Implement xxeval matheus.ferst
2022-01-25 12:19 ` [PATCH v2 26/38] target/ppc: Implement xxgenpcv[bhwd]m instruction matheus.ferst
2022-01-25 12:19 ` [PATCH v2 27/38] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree matheus.ferst
2022-01-25 12:19 ` [PATCH v2 28/38] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o] matheus.ferst
2022-01-25 12:19 ` [PATCH v2 29/38] target/ppc: Implement xvtlsbb instruction matheus.ferst
2022-01-25 12:19 ` [PATCH v2 30/38] target/ppc: Remove xscmpnedp instruction matheus.ferst
2022-01-25 12:19 ` matheus.ferst [this message]
2022-01-25 12:19 ` [PATCH v2 32/38] target/ppc: Implement xscmp{eq,ge,gt}qp matheus.ferst
2022-01-25 12:19 ` [PATCH v2 33/38] target/ppc: Implement do_helper_XX3 and move xxperm* to use it matheus.ferst
2022-01-25 12:19 ` [PATCH v2 34/38] target/ppc: Move xscmp{eq,ge,gt}dp to decodetree matheus.ferst
2022-01-25 12:19 ` [PATCH v2 35/38] target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3 matheus.ferst
2022-01-25 12:19 ` [PATCH v2 36/38] target/ppc: Refactor VSX_MAX_MINC helper matheus.ferst
2022-01-25 12:19 ` [PATCH v2 37/38] target/ppc: Implement xs{max,min}cqp matheus.ferst
2022-01-25 12:19 ` [PATCH v2 38/38] target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions matheus.ferst

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