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From: Maxime Ripard <maxime@cerno.tech>
To: dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>,
	Daniel Vetter <daniel.vetter@intel.com>,
	Maxime Ripard <maxime@cerno.tech>,
	Thomas Zimmermann <tzimmermann@suse.de>
Subject: [PATCH v2 3/7] drm/vc4: hvs: Store channel in variable
Date: Thu, 31 Mar 2022 16:37:40 +0200	[thread overview]
Message-ID: <20220331143744.777652-4-maxime@cerno.tech> (raw)
In-Reply-To: <20220331143744.777652-1-maxime@cerno.tech>

The assigned_channel field of our vc4_crtc_state structure is accessed
multiple times in vc4_hvs_atomic_flush, so let's move it to a variable
that can be used in all those places.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hvs.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index c8cae10500b9..d225eea6e640 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -460,6 +460,7 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
 	struct drm_device *dev = crtc->dev;
 	struct vc4_dev *vc4 = to_vc4_dev(dev);
 	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+	unsigned int channel = vc4_state->assigned_channel;
 	struct drm_plane *plane;
 	struct vc4_plane_state *vc4_plane_state;
 	bool debug_dump_regs = false;
@@ -500,8 +501,8 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
 		/* This sets a black background color fill, as is the case
 		 * with other DRM drivers.
 		 */
-		HVS_WRITE(SCALER_DISPBKGNDX(vc4_state->assigned_channel),
-			  HVS_READ(SCALER_DISPBKGNDX(vc4_state->assigned_channel)) |
+		HVS_WRITE(SCALER_DISPBKGNDX(channel),
+			  HVS_READ(SCALER_DISPBKGNDX(channel)) |
 			  SCALER_DISPBKGND_FILL);
 
 	/* Only update DISPLIST if the CRTC was already running and is not
@@ -515,7 +516,7 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
 		vc4_hvs_update_dlist(crtc);
 
 	if (crtc->state->color_mgmt_changed) {
-		u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(vc4_state->assigned_channel));
+		u32 dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(channel));
 
 		if (crtc->state->gamma_lut) {
 			vc4_hvs_update_gamma_lut(crtc);
@@ -527,7 +528,7 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
 			 */
 			dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
 		}
-		HVS_WRITE(SCALER_DISPBKGNDX(vc4_state->assigned_channel), dispbkgndx);
+		HVS_WRITE(SCALER_DISPBKGNDX(channel), dispbkgndx);
 	}
 
 	if (debug_dump_regs) {
-- 
2.35.1


  parent reply	other threads:[~2022-03-31 14:38 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-31 14:37 [PATCH v2 0/7] drm/vc4: hvs: Various improvements Maxime Ripard
2022-03-31 14:37 ` [PATCH v2 1/7] drm/vc4: kms: Take old state core clock rate into account Maxime Ripard
2022-03-31 14:37 ` [PATCH v2 2/7] drm/vc4: hvs: Fix frame count register readout Maxime Ripard
2022-03-31 14:37 ` Maxime Ripard [this message]
2022-03-31 14:37 ` [PATCH v2 4/7] drm/vc4: hvs: Remove dlist setup duplication Maxime Ripard
2022-03-31 14:37 ` [PATCH v2 5/7] drm/vc4: hvs: Move the dlist setup to its own function Maxime Ripard
2022-04-06 10:41   ` Thomas Zimmermann
2022-03-31 14:37 ` [PATCH v2 6/7] drm/vc4: kms: Ignore atomic_flush if we're disabled Maxime Ripard
2022-03-31 14:37 ` [PATCH v2 7/7] drm/vc4: hvs: Use pointer to HVS in HVS_READ and HVS_WRITE macros Maxime Ripard
2022-04-06 10:44 ` [PATCH v2 0/7] drm/vc4: hvs: Various improvements Thomas Zimmermann
2022-04-06 13:26 ` Maxime Ripard

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