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From: <daire.mcnamara@microchip.com>
To: <helgaas@kernel.org>
Cc: <bhelgaas@google.com>, <conor.dooley@microchip.com>,
	<cyril.jean@microchip.com>, <maz@kernel.org>,
	<daire.mcnamara@microchip.com>, <david.abdurachmanov@gmail.com>,
	<linux-pci@vger.kernel.org>, <lorenzo.pieralisi@arm.com>,
	<robh@kernel.org>
Subject: [RESEND PATCH v1 1/1] PCI: microchip: Fix potential race in interrupt handling
Date: Tue, 5 Apr 2022 12:17:51 +0100	[thread overview]
Message-ID: <20220405111751.166427-1-daire.mcnamara@microchip.com> (raw)

From: Daire McNamara <daire.mcnamara@microchip.com>

Clear MSI bit in ISTATUS register after reading it before
handling individual MSI bits

This fixes a potential race condition pointed out by Bjorn Helgaas:
https://lore.kernel.org/linux-pci/20220127202000.GA126335@bhelgaas/

Fixes: 6f15a9c9f941 ("PCI: microchip: Add Microchip PolarFire PCIe controller driver")
Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
---
Adding linux-pci mailing list
 drivers/pci/controller/pcie-microchip-host.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/pci/controller/pcie-microchip-host.c b/drivers/pci/controller/pcie-microchip-host.c
index 29d8e81e4181..da8e3fdc97b3 100644
--- a/drivers/pci/controller/pcie-microchip-host.c
+++ b/drivers/pci/controller/pcie-microchip-host.c
@@ -416,6 +416,7 @@ static void mc_handle_msi(struct irq_desc *desc)
 
 	status = readl_relaxed(bridge_base_addr + ISTATUS_LOCAL);
 	if (status & PM_MSI_INT_MSI_MASK) {
+		writel_relaxed(status & PM_MSI_INT_MSI_MASK, bridge_base_addr + ISTATUS_LOCAL);
 		status = readl_relaxed(bridge_base_addr + ISTATUS_MSI);
 		for_each_set_bit(bit, &status, msi->num_vectors) {
 			ret = generic_handle_domain_irq(msi->dev_domain, bit);
@@ -432,13 +433,8 @@ static void mc_msi_bottom_irq_ack(struct irq_data *data)
 	void __iomem *bridge_base_addr =
 		port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
 	u32 bitpos = data->hwirq;
-	unsigned long status;
 
 	writel_relaxed(BIT(bitpos), bridge_base_addr + ISTATUS_MSI);
-	status = readl_relaxed(bridge_base_addr + ISTATUS_MSI);
-	if (!status)
-		writel_relaxed(BIT(PM_MSI_INT_MSI_SHIFT),
-			       bridge_base_addr + ISTATUS_LOCAL);
 }
 
 static void mc_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
-- 
2.25.1


             reply	other threads:[~2022-04-05 12:42 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-05 11:17 daire.mcnamara [this message]
2022-04-28  6:30 ` [RESEND PATCH v1 1/1] PCI: microchip: Fix potential race in interrupt handling Conor.Dooley
2022-04-28  9:29 ` Lorenzo Pieralisi
2022-04-29  9:42   ` Conor.Dooley
2022-04-29 21:57     ` Bjorn Helgaas
2022-04-29 23:33       ` Marc Zyngier
2022-05-02 19:22         ` Bjorn Helgaas
2022-05-04 15:12           ` Conor Dooley
2022-05-04 16:53             ` Lorenzo Pieralisi
2022-05-04 16:57               ` Conor Dooley
2022-05-04 16:59             ` Bjorn Helgaas
2022-05-11 10:00               ` Conor Dooley
2022-05-11 12:41                 ` Lorenzo Pieralisi

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