Re: [PATCH net-next v5 12/13] ARM: dts: r9a06g032: describe switch

From: Vladimir Oltean <olteanv@gmail.com>
To: "Clément Léger" <clement.leger@bootlin.com>
Cc: "Andrew Lunn" <andrew@lunn.ch>,
	"Vivien Didelot" <vivien.didelot@gmail.com>,
	"Florian Fainelli" <f.fainelli@gmail.com>,
	"David S . Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Russell King" <linux@armlinux.org.uk>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Herve Codina" <herve.codina@bootlin.com>,
	"Miquèl Raynal" <miquel.raynal@bootlin.com>,
	"Milan Stevanovic" <milan.stevanovic@se.com>,
	"Jimmy Lalande" <jimmy.lalande@se.com>,
	"Pascal Eberhard" <pascal.eberhard@se.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH net-next v5 12/13] ARM: dts: r9a06g032: describe switch
Date: Thu, 19 May 2022 21:28:12 +0300	[thread overview]
Message-ID: <20220519182812.lmp2gp6m47jt742y@skbuf> (raw)
In-Reply-To: <20220519153107.696864-13-clement.leger@bootlin.com>

On Thu, May 19, 2022 at 05:31:06PM +0200, Clément Léger wrote:
> Add description of the switch that is present on the RZ/N1 SoC.
> 
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> ---
>  arch/arm/boot/dts/r9a06g032.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
> index 31c4b2e2950a..20d3dce632ce 100644
> --- a/arch/arm/boot/dts/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> @@ -255,6 +255,15 @@ mii_conv5: mii-conv@5 {
>  			};
>  		};
>  
> +		switch: switch@44050000 {
> +			compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";
> +			reg = <0x44050000 0x10000>;
> +			clocks = <&sysctrl R9A06G032_HCLK_SWITCH>,
> +				 <&sysctrl R9A06G032_CLK_SWITCH>;
> +			clock-names = "hclk", "clk";
> +			status = "disabled";

Does the switch port count depend on anything? If it doesn't, maybe you
could add the "ethernet-ports" node and all the ports here, with status
= "disabled", so that board files don't need to spell them out each time?
I'm also thinking you could define the fixed-link and phy-mode = "internal"
property of the CPU port with this occasion. That surely isn't a
per-board thing.

> +		};
> +
>  		gic: interrupt-controller@44101000 {
>  			compatible = "arm,gic-400", "arm,cortex-a7-gic";
>  			interrupt-controller;
> -- 
> 2.36.0
> 